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SN74CBT3251_15 Datasheet, PDF (9/25 Pages) Texas Instruments – FET Multiplexer and Demultiplexer
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SN74CBT3251
SCDS019M – MAY 1995 – REVISED DECEMBER 2015
Typical Application (continued)
2. Input and output current consideration:
– Load currents must not exceed per output and must not exceed (Continuous current through VCC or
GND) total current for the part. These limits are located in Absolute Maximum Ratings.
9.2.3 Application Curve
100
80
60
40
20
0
-20
-40
-60
0
1
2
3
4
5
6
rON | On-state resistance ( )
Figure 5. rON Over Temperature
rON over temp
7
8
C001
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in
Recommended Operating Conditions.
Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-μF capacitor is recommended and if there are multiple VCC pins then a 0.01-μF or 0.022-μF
capacitor is recommended for each power pin. It is ok to parallel multiple bypass caps to reject different
frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be
installed as close to the power pin as possible for best results.
11 Layout
11.1 Layout Guidelines
When using multiple bit logic devices inputs must not ever float. In many cases, functions or parts of functions of
digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3
of the 4 buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at
the outside connections result in undefined operational states. Specified below are the rules that must be
observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low
bias to prevent them from floating. The logic level that should be applied to any particular unused input depends
on the function of the device. Generally they will be tied to GND or VCC whichever make more sense or is more
convenient.
11.2 Layout Example
VCC
Unused Input
Input
Output
Input
Unused Input
Output
Figure 6. Layout Diagram
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