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MSP430FR573X Datasheet, PDF (9/109 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER | |||
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MSP430FR573x
MSP430FR572x
www.ti.com
SLAS639D â JULY 2011 â REVISED AUGUST 2012
Functional Block Diagram â
MSP430FR5720IRGE, MSP430FR5724IRGE, MSP430FR5728IRGE,
MSP430FR5730IRGE, MSP430FR5734IRGE, MSP430FR5738IRGE
PJ.4/XIN PJ.5/XOUT
DVCC DVSS VCORE AVCC AVSS
PA
P1.x P2.x
Clock
System
ACLK
SMCLK
16 KB
(â5738, â5728)
8 KB
(â5734, â5724)
4 KB
(â5730, â5720)
MCLK
FRAM
Memory
Protection
Unit
CPUXV2
and
Working
Registers
MAB
MDB
1 KB
RAM
Boot
ROM
Power
Management
SVS
SYS
Watchdog
REF
I/O Ports
P1/P2
1Ã8 I/Os
1Ã3 I/Os
Interrupt
& Wakeup
PA
1Ã11 I/Os
DMA
3 Channel
RST/NMI/SBWTDIO
TEST/SBWTCK
PJ.0/TDO
PJ.1/TDI/TCLK
PJ.2/TMS
PJ.3/TCK
EEM
(S: 3+1)
JTAG/
SBW
Interface
MPY32
TA0
TB0
TA1
(2) Timer_A (1) Timer_B
3 CC
3 CC
Registers Registers
RTC_B
CRC
eUSCI_A0:
UART,
IrDA, SPI
eUSCI_B0:
SPI, I2C
ADC10_B
10 Bit
200KSPS
8 channels
(6 ext/2 int)
Comp_D
10 channels
Functional Block Diagram â
MSP430FR5722IRGE, MSP430FR5726IRGE,
MSP430FR5732IRGE, MSP430FR5736IRGE
PJ.4/XIN PJ.5/XOUT
DVCC DVSS VCORE AVCC AVSS
Clock
System
ACLK
SMCLK
16 KB
(â5736, â5726)
8 KB
(â5732, â5722)
MCLK
FRAM
Memory
Protection
Unit
CPUXV2
and
Working
Registers
MAB
MDB
1 KB
RAM
Boot
ROM
Power
Management
SVS
SYS
Watchdog
PA
P1.x P2.x
I/O Ports
P1/P2
1Ã8 I/Os
1Ã3 I/Os
Interrupt
& Wakeup
PA
1Ã11 I/Os
DMA
3 Channel
RST/NMI/SBWTDIO
TEST/SBWTCK
PJ.0/TDO
PJ.1/TDI/TCLK
PJ.2/TMS
PJ.3/TCK
EEM
(S: 3+1)
JTAG/
SBW
Interface
MPY32
TA0
TB0
TA1
(2) Timer_A (1) Timer_B
3 CC
3 CC
Registers Registers
RTC_B
CRC
eUSCI_A0:
UART,
IrDA, SPI
eUSCI_B0:
SPI, I2C
REF
Comp_D
10 channels
Copyright © 2011â2012, Texas Instruments Incorporated
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