DS90C385A_15 Datasheet, PDF (9/20 Pages) Texas Instruments – +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display Link-87.5 MHz

DS90C385A
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Pin Name
TxIN
TxOUT+
TxOUT-
TxCLKIN
R_FB
TxCLK OUT+
TxCLK OUT-
PWR DOWN
V_CC
GND
PLL V_CC
PLL GND
LVDS V_CC
LVDS GND
SNLS167K – MARCH 2004 – REVISED APRIL 2013
DS90C385A DGG (TSSOP) Package Pin Descriptions — FPD Link Transmitter
I/O
No.
Description
I
28 LVTTL level input. This includes: 8 Red, 8 Green, 8 Blue, and 4 control lines—FPLINE, FPFRAME
and DRDY (also referred to as HSYNC, VSYNC, Data Enable).
O
4 Positive LVDS differentiaI data output.
O
4 Negative LVDS differential data output.
I
1 LVTTL Ievel clock input. Pin name TxCLK IN.
I
1 LVTTL Ievel programmable strobe select (See Table 1).
O
1 Positive LVDS differential clock output.
O
1 Negative LVDS differential clock output.
I
1 LVTTL level input. When asserted (low input) TRI-STATE the outputs, ensuring low current at power
down.
I
3 Power supply pins for LVTTL inputs.
I
5 Ground pins for LVTTL inputs.
I
1 Power supply pin for PLL.
I
2 Ground pins for PLL.
I
1 Power supply pin for LVDS outputs.
I
3 Ground pins for LVDS outputs.
Pin Diagram for TSSOP Package
Top View
Order Number DS90C385AMT
DGG Package
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