DS90C3201_15 Datasheet, PDF (9/22 Pages) Texas Instruments – 3.3V 8 MHz to 135 MHz Dual FPD-Link Transmitter

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DS90C3201
SNLS192D – APRIL 2005 – REVISED APRIL 2013
AC Timing Diagrams (continued)
PWDNB
1.5V
V_DD
TCLK IN
3.15V
TPLLS
TCLK OUT
VDIFF
= 0V
Figure 10. Phase Lock Loop Set Time
PWDNB
1.5V
TxCLK IN
TCLK OUT
TPDD
VDIFF
= 0V
500 mV
GND
Figure 11. Transmitter Powerdown Delay
TxCLK IN
TxIN
RFB = 0
RFB = 1
Figure 12. LVTLL Input Programmable Strobe Select
Ideal Bit Start
Ideal Bit Stop
1 UI = T_CIP/7
Ideal Pulse Width
Figure 13. Serializer Ideal Pulse Width
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