DRV8837C Datasheet, PDF (9/21 Pages) Texas Instruments – 1-A Low-Voltage H-Bridge Driver

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DRV8837C
SLVSD61A – JULY 2016 – REVISED JULY 2016
7.3 Feature Description
7.3.1 Bridge Control
The DRV8837C device is controlled using a PWM input interface, also called an IN/IN interface. Each output is
controlled by a corresponding input pin.
Table 1 shows the logic for the DRV8837C device.
nSLEEP
0
1
1
1
1
Table 1. DRV8837C Device Logic
IN1
IN2
OUT1
OUT2
FUNCTION (DC MOTOR)
X
X
Z
Z
Coast
0
0
Z
Z
Coast
0
1
L
H
Reverse
1
0
H
L
Forward
1
1
L
L
Brake
7.3.2 Sleep Mode
If the nSLEEP pin is brought to a logic-low state, the DRV8837C device enters a low-power sleep mode. In this
state, all unnecessary internal circuitry is powered down.
7.3.3 Power Supplies and Input Pins
The input pins can be driven within the recommended operating conditions with or without the VCC, VM, or both
power supplies present. No leakage current path exists to the supply. Each input pin has a weak pulldown
resistor (approximately 100 kΩ) to ground.
The VCC and VM supplies can be applied and removed in any order. When the VCC supply is removed, the
device enters a low-power state and draws very little current from the VM supply. The VCC and VM pins can be
connected together if the supply voltage is between 1.8 and 7 V.
The VM voltage supply does not have any undervoltage-lockout protection (UVLO). As long as V_CC > 1.8 V, the
internal device logic remains active which means that the VM pin voltage can drop to 0 V, however, the load may
not be sufficiently driven at low VM voltages.
7.3.4 Protection Circuits
The DRV8837C is fully protected against VCC undervoltage, overcurrent, and overtemperature events.
VCC undervoltage lockout If at any time the voltage on the VCC pin falls below the undervoltage lockout
threshold voltage, all FETs in the H-bridge are disabled. Operation resumes when the VCC pin
voltage rises above the UVLO threshold.
Overcurrent protection (OCP) An analog current-limit circuit on each FET limits the current through the FET by
removing the gate drive. If this analog current limit persists for longer than t_DEG, all FETs in the H-
bridge are disabled. Operation resumes automatically after t_RETRY has elapsed. Overcurrent
conditions are detected on both the high-side and low-side devices. A short to the VM pin, GND, or
from the OUT1 pin to theOUT2 pin results in an overcurrent condition.
Thermal shutdown (TSD) If the die temperature exceeds safe limits, all FETs in the H-bridge are disabled. After
the die temperature falls to a safe level, operation automatically resumes.
FAULT
VCC undervoltage (UVLO)
Overcurrent (OCP)
Thermal Shutdown (TSD)
Table 2. Fault Behavior
CONDITION
VCC < 1.7 V
I_OUT > 1.2 A (MIN)
T_J > 150°C (MIN)
H-BRIDGE
Disabled
Disabled (retries
automatically)
Disabled (retries
automatically)
RECOVERY
VCC > 1.8 V
t_RETRY elapses
T_J < 150°C
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