5962-9086302M3A Datasheet, PDF (9/39 Pages) Texas Instruments – VOICE-BAND ANALOG INTERFACE CIRCUITS

TLC32044C, TLC32044E, TLC32044I, TLC32044M, TLC32045C, TLC32045I
VOICE-BAND ANALOG INTERFACE CIRCUITS
SLAS017F − MARCH 1988 − REVISED MAY 1995
INTERNAL TIMING CONFIGURATION
20.736 MHz (1)
41.472 MHz (2)
MSTR CLK
5.184 MHz (1)
10.368 MHz (2)
XTAL
OSC
TMS(SMJ)320
DSP
Optional External Circuitry
for Full Duplex Modems
153.6-kHz
Clock (1)
Divide
by 135
Commercial
External
Front-End
Full-Duplex
Split-Band
Filters^†
Divide by 4
TA Register
(5 bits)
TA’ Register
(6 bits)
(2’s compl)
Adder/
Subtractor
(6 bits)
SHIFT CLK
1.296 MHz (1)
2.592 MHz (2)
Divide by 2
TB Register
(6 bits)
Low-Pass/
(sin x/x
Correction
Switched
Capacitor Filter
CLK = 288-kHz
Square Wave
d₀, d₁ = 0,0
d₀, d₁ = 1,1^‡
d₀, d₁ = 0,1
d₀, d₁ = 1,0^‡
TX Counter A
[ TA = 9 (1)]
[ TA = 18 (2)]
(6 bits)
576-kHz
Pulses
RA Register
(5 bits)
RA’ Register
(6 bits)
(2’s compl)
Adder/
Subtractor
(6 bits)
TX Counter B
[ TB = 40; 7.2 kHz]
[ TB = 36; 8.0 kHz]
[ TB = 30; 9.6 kHz]
[ TB = 20; 14.4 kHz]
[ TB = 15; 19.2 kHz]
Divide by 2
RB Register
(6 bits)
D/A
Conversion
Frequency
Low-Pass
Switched
Capacitor Filter
CLK = 288-kHz
Square Wave
d₀, d₁ = 0,0
d₀, d₁ = 1,1^‡
d₀, d₁ = 0,1
d₀, d₁ = 1,0^‡
RX Counter A
[RA = 9 (1)]
[RA = 18 (2)]
(6 bits)
576-kHz
Pulses
RX Counter B
[RB = 40; 7.2 kHz]
[RB = 36; 8.0 kHz]
[RB = 30; 9.6 kHz]
[RB = 20; 14.4 kHz]
[RB = 15; 19.2 kHz]
A/D
Conversion
Frequency/
High-Pass
Switched
Capacitor
Filter CLK
† _{Split-band filtering can alternatively be performed after the analog input function via software in the TMS(SMJ)320.}
‡ _{These control bits are described in the AIC DX data word format section.}
NOTE: Frequency 1 (20.736 MHz) is used to show how 153.6 kHz (for a commercially available modem split-band filter clock), popular speech
and modem sampling signal frequencies, and an internal 288-kHz switched-capacitor filter clock can be derived synchronously and as
submultiples of the crystal oscillator frequency. Since these derived frequencies are synchronous submultiples of the crystal frequency,
aliasing does not occur as the sampled analog signal passes between the analog converter and switched-capacitor filter stages.
Frequency 2 (41.472 MHz) is used to show that the AIC can work with high-frequency signals, which are used by high-speed digital signal
processors.
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