TM4C1237H6PZ Datasheet, PDF (882/1307 Pages) Texas Instruments – Tiva Microcontroller

Analog-to-Digital Converter (ADC)
Register 60: ADC Peripheral Configuration (ADCPC), offset 0xFC4
The ADCPC register provides information regarding the configuration of the peripheral.
ADC Peripheral Configuration (ADCPC)
ADC0 base: 0x4003.8000
ADC1 base: 0x4003.9000
Offset 0xFC4
Type RW, reset 0x0000.0007
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
SR
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
Bit/Field
31:4
3:0
Name
reserved
SR
Type
Reset Description
RO 0x0000.0000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RW
0x7
ADC Sample Rate
This field specifies the number of ADC conversions per second and is
used in Run, Sleep, and Deep-Sleep modes. The field encoding is based
on the legacy RCGC0 register encoding. The programmed sample rate
cannot exceed the maximum sample rate specified by the MSR field in
the ADCPP register. The SR field is encoded as follows:
Value Description
0x0
Reserved
0x1
125 ksps
0x2
Reserved
0x3
250 ksps
0x4
Reserved
0x5
500 ksps
0x6
Reserved
0x7
1 Msps
0x8 - 0xF Reserved
882
June 12, 2014
Texas Instruments-Production Data