LM3S5956 Datasheet, PDF (841/1261 Pages) Texas Instruments – Stellaris® LM3S5951 Microcontroller

Stellaris^® LM3S5951 Microcontroller
Bit/Field
5
Name
ARB
Type
R/W
4
CONTROL
R/W
3
CLRINTPND
R/W
2
NEWDAT / TXRQST R/W
Reset
0
Description
Access Arbitration Bits
Value
0
1
Description
Arbitration bits unchanged.
Transfer ID + DIR + XTD + MSGVAL of the message
object into the Interface registers.
0
Access Control Bits
Value
0
1
Description
Control bits unchanged.
Transfer control bits from the CANIFnMCTL register
into the Interface registers.
0
Clear Interrupt Pending Bit
The function of this bit depends on the configuration of the WRNRD bit.
Value Description
0 If WRNRD is clear, the interrupt pending status is transferred
from the message buffer into the CANIFnMCTL register.
If WRNRD is set, the INTPND bit in the message object remains
unchanged.
1 If WRNRD is clear, the interrupt pending status is cleared in the
message buffer. Note the value of this bit that is transferred
to the CANIFnMCTL register always reflects the status of the
bits before clearing.
If WRNRD is set, the INTPND bit is cleared in the message
object.
0
NEWDAT / TXRQST Bit
The function of this bit depends on the configuration of the WRNRD bit.
Value Description
0 If WRNRD is clear, the value of the new data status is transferred
from the message buffer into the CANIFnMCTL register.
If WRNRD is set, a transmission is not requested.
1 If WRNRD is clear, the new data status is cleared in the message
buffer. Note the value of this bit that is transferred to the
CANIFnMCTL register always reflects the status of the bits
before clearing.
If WRNRD is set, a transmission is requested. Note that when
this bit is set, the TXRQST bit in the CANIFnMCTL register is
ignored.
January 20, 2012
841
Texas Instruments-Production Data