LM3S5956 Datasheet, PDF (659/1261 Pages) Texas Instruments – Stellaris® LM3S5951 Microcontroller

Stellaris^® LM3S5951 Microcontroller
Register 10: UART Interrupt Mask (UARTIM), offset 0x038
The UARTIM register is the interrupt mask set/clear register.
On a read, this register gives the current value of the mask on the relevant interrupt. Setting a bit
allows the corresponding raw interrupt signal to be routed to the interrupt controller. Clearing a bit
prevents the raw interrupt signal from being sent to the interrupt controller.
Note that bits [3:0] are only implemented on UART1. These bits are reserved on UART0 and UART2.
UART Interrupt Mask (UARTIM)
UART0 base: 0x4000.C000
UART1 base: 0x4000.D000
UART2 base: 0x4000.E000
Offset 0x038
Type R/W, reset 0x0000.0000
31
30
29
28
27
Type RO
RO
RO
Reset
0
0
0
15
14
13
LME5IM LME1IM LMSBIM
Type R/W
R/W
R/W
Reset
0
0
0
RO
RO
0
0
12
11
reserved
RO
RO
0
0
26
RO
0
10
OEIM
R/W
0
25
RO
0
9
BEIM
R/W
0
24
23
reserved
RO
RO
0
0
8
PEIM
R/W
0
7
FEIM
R/W
0
22
RO
0
6
RTIM
R/W
0
21
RO
0
5
TXIM
R/W
0
20
19
18
17
16
RO
RO
RO
RO
0
0
0
0
4
RXIM
R/W
0
3
2
1
DSRIM DCDIM CTSIM
R/W
R/W
R/W
0
0
0
RO
0
0
RIIM
R/W
0
Bit/Field
31:16
15
Name
reserved
LME5IM
Type
RO
R/W
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
LIN Mode Edge 5 Interrupt Mask
Value Description
1 An interrupt is sent to the interrupt controller when the LME5RIS
bit in the UARTRIS register is set.
0 The LME5RIS interrupt is suppressed and not sent to the
interrupt controller.
14
LME1IM
R/W
0
LIN Mode Edge 1 Interrupt Mask
Value Description
1 An interrupt is sent to the interrupt controller when the LME1RIS
bit in the UARTRIS register is set.
0 The LME1RIS interrupt is suppressed and not sent to the
interrupt controller.
13
LMSBIM
R/W
0
LIN Mode Sync Break Interrupt Mask
Value Description
1 An interrupt is sent to the interrupt controller when the LMSBRIS
bit in the UARTRIS register is set.
0 The LMSBRIS interrupt is suppressed and not sent to the
interrupt controller.
January 20, 2012
659
Texas Instruments-Production Data