LM3S5P56 Datasheet, PDF (812/1147 Pages) Texas Instruments – Stellaris LM3S5P56 Microcontroller

Universal Serial Bus (USB) Controller
17.4
17.4.1
Table 17-3. Actual Bytes Read (continued)
Value
3
Description
MAXLOAD+1
Table 17-4. Packet Sizes That Clear RXRDY
Value
0
1
2
3
Description
MAXLOAD, MAXLOAD-1, MAXLOAD-2, MAXLOAD-3
MAXLOAD
MAXLOAD, MAXLOAD-1
MAXLOAD, MAXLOAD-1, MAXLOAD-2
To enable DMA operation for the endpoint receive channel, the DMAEN bit of the USBRXCSRHn
register should be set. To enable DMA operation for the endpoint transmit channel, the DMAEN bit
of the USBTXCSRHn register must be set.
See “Micro Direct Memory Access (μDMA)” on page 354 for more details about programming the
μDMA controller.
Initialization and Configuration
To use the USB Controller, the peripheral clock must be enabled via the RCGC2 register (see
page 278). In addition, the clock to the appropriate GPIO module must be enabled via the RCGC2
register in the System Control module (see page 278). To find out which GPIO port to enable, refer
to Table 22-4 on page 1057. Configure the PMCn fields in the GPIOPCTL register to assign the USB
signals to the appropriate pins (see page 449 and Table 22-5 on page 1063).
The initial configuration in all cases requires that the processor enable the USB controller and USB
controller’s physical layer interface (PHY) before setting any registers. The next step is to enable
the USB PLL so that the correct clocking is provided to the PHY. To ensure that voltage is not
supplied to the bus incorrectly, the external power control signal, USB0EPEN, should be negated on
start up by configuring the USB0EPEN and USB0PFLT pins to be controlled by the USB controller
and not exhibit their default GPIO behavior.
Note:
When used in OTG mode, USB0VBUS and USB0ID do not require any configuration as they
are dedicated pins for the USB controller and directly connect to the USB connector's VBUS
and ID signals. If the USB controller is used as either a dedicated Host or Device, the
DEVMODOTG and DEVMOD bits in the USB General-Purpose Control and Status
(USBGPCS) register can be used to connect the USB0VBUS and USB0ID inputs to fixed
levels internally, freeing the PB0 and PB1 pins for GPIO use. For proper self-powered Device
operation, the VBUS value must still be monitored to assure that if the Host removes VBUS,
the self-powered Device disables the D+/D- pull-up resistors. This function can be
accomplished by connecting a standard GPIO to VBUS.
The termination resistors for the USB PHY have been added internally, and thus there is
no need for external resistors. For a device, there is a 1.5 KOhm pull-up on the D+ and for
a host there are 15 KOhm pull-downs on both D+ and D-.
Pin Configuration
When using the Device controller portion of the USB controller in a system that also provides Host
functionality, the power to VBUS must be disabled to allow the external Host controller to supply
power. Usually, the USB0EPEN signal is used to control the external regulator and should be negated
to avoid having two devices driving the USB0VBUS power pin on the USB connector.
812
July 03, 2014
Texas Instruments-Production Data