English
Language : 

DP83640TVVX Datasheet, PDF (81/137 Pages) Texas Instruments – DP83640 Precision PHYTER - IEEE 1588 Precision Time Protocol Transceiver
DP83640
www.ti.com
SNOSAY8E – SEPTEMBER 2007 – REVISED APRIL 2013
Register
Name
PTP Event
Configuration
Register
PTP Transmit
Configuration
Register 0
PTP Transmit
Configuration
Register 1
PHY Status
Frame
Configuration
Register 0
PTP Receive
Configuration
Register 0
PTP Receive
Configuration
Register 1
PTP Receive
Configuration
Register 2
PTP Receive
Configuration
Register 3
PTP Receive
Configuration
Register 4
PTP
Temporary
Rate Duration
Low Register
PTP
Temporary
Rate Duration
High Register
Addr
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
PTP Clock
14h
Output Control
Register
PHY Status 15h
Frame
Configuration
Register 1
Table 10-2. Register Table (continued)
Tag
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PTP_EV Reserve EVNT_R EVNT_F Reserve EVNT_ EVNT_ EVNT_ EVNT_ Reserve Reserve Reserved Reserve EVNT_SE EVNT_S EVNT_SE EVNT_
NT
d
ISE
ALL
d
GPIO GPIO GPIO GPIO
d
d
d
L
EL
L
WR
PTP_TX SYNC_1 Reserve DR_INS Reserve RESER CRC_1S CHK_1S IP1588_ TX_L2_ TX_IPV TX_IPV4_ TX_PTP TX_PTP_ TX_PTP TX_PTP_ TX_TS_
CFG0
STEP
d
ERT
d
VED_1 TEP
TEP
EN
EN
6_EN
EN
_VER
VER
_VER
VER
EN
PTP_TX BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_D BYTE0_ BYTE0_D BYTE0_ BYTE0_D BYTE0_
CFG1
MASK MASK MASK MASK MASK MASK MASK MASK DATA DATA
ATA
DATA
ATA
DATA
ATA
DATA
PSF_CF Reserve Reserve Reserve MAC_S MAC_S MIN_PR MIN_PR MIN_PR PSF_EN PSF_IP PSF_PCF PSF_ER PSF_TXT PSF_RX PSF_TRIG PSF_EV
G0
d
d
d
RC_AD RC_AD
E
E
E
DIAN
V4
_RD
R_EN
S_EN TS_EN
_EN
NT_EN
D
D
PTP_RX DOMAI Reserve USER_I USER_I RX_SLA IP1588_ IP1588_ IP1588_ RX_L2_ RX_IPV RX_IPV4_ RX_PTP RX_PTP_ RX_PTP RX_PTP_ RX_TS_
CFG0
N_EN
d
P_SEL P_EN
VE
EN
EN
EN
EN
6_EN
EN
_VER
VER
_VER
VER
EN
PTP_RX BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_ BYTE0_D BYTE0_ BYTE0_D BYTE0_ BYTE0_D BYTE0_
CFG1
MASK MASK MASK MASK MASK MASK MASK MASK DATA DATA
ATA
DATA
ATA
DATA
ATA
DATA
PTP_RX IP_ADD IP_ADD IP_ADD IP_ADD IP_ADD IP_ADD IP_ADD IP_ADD IP_ADD IP_ADD IP_ADDR_ IP_ADD IP_ADDR_ IP_ADD IP_ADDR_ IP_ADD
CFG2 R_DATA R_DATA R_DATA R_DATA R_DATA R_DATA R_DATA R_DATA R_DATA R_DATA DATA R_DATA DATA R_DATA DATA R_DATA
PTP_RX TS_MIN TS_MIN TS_MIN TS_MIN ACC_U ACC_C TS_APP TS_INS PTP_D PTP_D PTP_DOM PTP_D PTP_DOM PTP_D PTP_DOM PTP_D
CFG3
_IFG
_IFG
_IFG
_IFG
DP
RC
END
ERT OMAIN OMAIN
AIN
OMAIN
AIN
OMAIN
AIN
OMAIN
PTP_RX IPV4_U TS_SEC TS_SEC TS_SEC RXTS_N RXTS_N RXTS_N RXTS_N RXTS_N RXTS_N RXTS_SE RXTS_S RXTS_SE RXTS_S RXTS_SE RXTS_S
CFG4 DP_MO _EN
_LEN _LEN S_OFF S_OFF S_OFF S_OFF S_OFF S_OFF C_OFF EC_OFF C_OFF EC_OFF C_OFF EC_OFF
D
PTP_TR PTP_TR PTP_TR PTP_TR PTP_TR PTP_TR PTP_TR PTP_TR PTP_TR PTP_TR PTP_TR PTP_TR_ PTP_TR PTP_TR_ PTP_TR PTP_TR_ PTP_TR
DL
_DURL _DURL _DURL _DURL _DURL _DURL _DURL _DURL _DURL _DURL DURL _DURL DURL _DURL DURL _DURL
PTP_TR Reserve Reserve Reserve Reserve Reserve Reserve PTP_TR PTP_TR PTP_TR PTP_TR PTP_TR_ PTP_TR PTP_TR_ PTP_TR PTP_TR_ PTP_TR
DH
d
d
d
d
d
d
_DURH _DURH _DURH _DURH DURH _DURH DURH _DURH DURH _DURH
PTP 1588 CONFIGURATION REGISTERS - PAGE 6
PTP_C
OC
PTP_CL
KOUT
EN
PTP_CL
KOUT
SEL
PTP_CL
KOUT
SPEED
SEL
Reserve
d
Reserve
d
Reserve
d
Reserve
d
Reserve
d
PTP_CL
KDIV
PTP_CL
KDIV
PTP_CLK
DIV
PTP_CL
KDIV
PTP_CLK
DIV
PTP_CL
KDIV
PTP_CLK
DIV
PTP_CL
KDIV
PSF_CF
G1
PTPRE
SERVE
D
PTPRE
SERVE
D
PTPRE
SERVE
D
PTPRE VERSIO VERSIO VERSIO VERSIO TRANS TRANS TRANSPO TRANS MESSAGE MESSA MESSAGE MESSA
SERVE NPTP NPTP NPTP NPTP PORTS PORTS RTSPECIF PORTS TYPE GETYP TYPE GETYP
D
PECIFIC PECIFIC
IC
PECIFIC
E
E
Copyright © 2007–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DP83640
Register Block
81