UC1846-SP_15 Datasheet, PDF (8/29 Pages) Texas Instruments – Current-Mode PWM Controller

UC1846-SP
SLUS871C – JANUARY 2009 – REVISED OCTOBER 2015
Electrical Characteristics (continued)
V_IN = 15 V, R_T = 10 kΩ, C_T = 4.7 nF, T_A = T_J = –55°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Input bias current
SHUTDOWN TERMINAL
V_E/A+ = V_REF, V_E/A– = 0 V
Threshold voltage
Input voltage range
Minimum latching current (I_{C/S SS})⁽⁴⁾
Maximum non-latching current (I_{C/S SS})⁽⁵⁾
Delay to outputs
OUTPUT
T_J = 25°C⁽¹⁾
Collector-emitter voltage
Collector leakage current
Output low-level voltage
Output high-level voltage
Rise time
Fall time
UVLO
V_C = 40 V
I_SINK = 20 mA
I_SINK = 100 mA
I_SOURCE = 20 mA
I_SOURCE = 100 mA
C_L = 1 nF, T_J = 25°C⁽¹⁾
C_L = 1 nF, T_J = 25°C⁽¹⁾
Start-up threshold
Threshold hysteresis
TOTAL STANDBY CURRENT
Supply current
(4) Current into C/S SS required to latch circuit in shutdown state.
(5) Current into C/S SS assured not to latch circuit in shutdown state.
6.6 Typical Characteristics
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MIN TYP
-30 –10
250 350
0
3 1.5
1.5
300
40
0.1
0.4
13 13.5
12 13.5
50
50
7.7
0.75
17
MAX UNIT
μA
400 mV
V_IN V
mA
0.8 mA
600 ns
V
200 μA
0.4 V
2.1 V
V
V
300 ns
300 ns
8V
V
21 mA
80
60
40
20
0
100 1k 10k 100k 1M
Frequency (Hz)
V_IN = 20 V
T_J = 25°C
0^o
-90^o
-180^o
.
Figure 1. Error Amplifier Gain and Phase vs Frequency
110
100
90
80
70
0 10 20 30 40 50 60 70 80 90 100
Output Load Resistance RL (k-W)
V_IN = 20 V
T_J = 25°C
Figure 2. Error Amplifier Open-Loop DC Gain vs Load
Resistance
8
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