TS3A5018_14 Datasheet, PDF (8/38 Pages) Texas Instruments – 10-Ω QUAD SPDT ANALOG SWITCH

TS3A5018
SCDS189F – JANUARY 2005 – REVISED MAY 2013
www.ti.com
Electrical Characteristics for 1.8-V Supply⁽¹⁾
V₊ = 1.65 V to 1.95 V, T_A = –40°C to 85°C (unless otherwise noted)
PARAMETER SYMBOL
TEST CONDITIONS
Analog Switch
Analog signal
range
V_COM, V_NC,
V_NO
ON-state
resistance
r_on
0 ≤ (V_NC or V_NO) ≤ V₊,
I_COM = –32 mA,
Switch ON,
See Figure 19
ON-state
resistance
match between
Δr_on
V_NC or V_NO = 1.5 V,
I_COM = –32 mA,
Switch ON,
See Figure 19
channels
ON-state
resistance
flatness
r_on(flat)
0 ≤ (V_NC or V_NO) ≤ V₊,
I_COM = –32 mA,
Switch ON,
See Figure 19
NC, NO
OFF leakage
current
I_NC(OFF),
I_NO(OFF)
V_NC or V_NO = 0.3 V,
V_COM = 1.65V,
or
V_NC or V_NO = 1.65V,
V_COM = 0.3 V,
V_NC or V_NO = 1.95 V to 0
V,
V_COM = 0 V to 1.95 V,
or
V_NC or V_NO = 0 V to 1.95
V,
V_COM = 1.95 V to 0 V,
Switch OFF,
See Figure 20
Switch OFF,
See Figure 20
COM
OFF leakage
current
I_COM(OFF)
V_COM = 1.65 V,
V_NC or V_NO = 0.3V,
or
V_COM = 0.3 V,
V_NC or V_NO = 1.65V,
Switch OFF,
See Figure 20
V_COM = 0 V to 1.95 V,
V_NC or V_NO = 1.95 V to 0
V,
or
V_COM = 1.95 V to 0,
V_NC or V_NO = 0 to 1.95 V,
Switch OFF,
See Figure 20
NC, NO
ON leakage
current
I_NC(ON),
I_NO(ON)
V_NC or V_NO = 0.3 V,
V_COM = Open,
or
V_NC or V_NO = 1.65 V,
V_COM = Open,
Switch ON,
See Figure 21
COM
ON leakage
current
I_COM(ON)
V_COM = 0.3 V,
V_NC or V_NO = Open,
or
V_COM = 1.65 V,
V_NC or V_NO = Open,
Digital Control Inputs (IN, EN)⁽²⁾
Switch ON,
See Figure 21
Input logic high
V_IH
V_I = V₊ or GND
Input logic low
V_IL
Input leakage
current
I_IH, I_IL
V_I = V₊ or 0
T_A
V₊
MIN
TYP MAX UNIT
0
25°C
Full
25°C
Full
1.65 V
1.65 V
25°C
Full
25°C
Full
1.65 V
1.95 V
–0.25
–4.5
25°C
–0.40
0V
Full
–6.5
V₊ V
5.50 8.00
Ω
14.55
0.30 1.00
Ω
1.2
2.70 5.50
Ω
7.30
0.03 0.25
4.50
0.01 0.40 _μA
6.50
25°C
Full
1.95 V
–0.40
–0.90
25°C
–0.40
0V
Full
–4.50
0.02 0.40
0.90
0.02 0.40 ^μA
4.50
25°C
–2.0
1.95 V
Full
–2.0
25°C
Full
1.95 V
–4.50
0.02 2.00
μA
0.02 2.00
4.50
μA
Full
Full
25°C
Full
1.95 V
1.95 V
1.95 V
1.00
0.00
–0.10
–2.10
3.60 V
0.40 V
0.01 0.10
μA
2.10
(1) The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
(2) All unused digital inputs of the device must be held at V₊ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
8
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