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SN74AUP1T14_15 Datasheet, PDF (8/14 Pages) Texas Instruments – LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER INVERTER GATE
SN74AUP1T14
SCES802 – APRIL 2010
www.ti.com
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL
(see Note A)
1 MΩ
LOAD CIRCUIT
CL
VMI
VMO
VCC = 2.5 V
± 0.2 V
5, 10, 15, 30 pF
VI/2
VCC/2
VCC = 3.3 V
± 0.3 V
5, 10, 15, 30 pF
VI/2
VCC/2
Input
VI
VMI
VMI
0V
tPLH
Output
VMO
tPHL
VMo
VOH
VOL
tPHL
tPLH
Output
VMo
VMo
VOH
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns.
C. The outputs are measured one at a time, with one transition per measurement.
D. tPLH and tPHL are the same as tpd.
Figure 5. Load Circuit and Voltage Waveforms
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