CD74HC297 Datasheet, PDF(8/15 Page) Texas Instruments – High-Speed CMOS Logic Digital Phase-Locked-Loop

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CD74HC297 Datasheet, PDF (8/15 Pages) Texas Instruments – High-Speed CMOS Logic Digital Phase-Locked-Loop

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CD54HC297, CD74HC297, CD74HCT297

MfC

fOUT

ÏOUT

fIN

ÏIN

KCP

D/U

ENCTR

DIVIDE-BY-K

COUNTER

CARRY

BORROW

XORPDOUT

ÏA1

ÏB

ECPDOUT

ÏA2

ECPD

K FF

I/D CIRCUIT

I/DOUT

I/DCP

2NfC

DIVIDE-BY-N

COUNTER

FIGURE 1. DPLL USING BOTH PHASE DETECTORS IN A RIPPLE-CANCELLATION SCHEME

MfC

fOUT

ÏIN

KCP

D/U

XORPDOUT

ÏA1

ÏB

DIVIDE-BY-K

COUNTER

CARRY

BORROW

I/D CIRCUIT

I/DCP

2NfC

I/DOUT

fOUT

ÏOUT

DIVIDE-BY-N

COUNTER

FIGURE 2. DPLL USING EXCLUSIVE-OR PHASE DETECTION

CARRY PULSE

(INTERNAL SIGNAL)

BORROW PULSE

(INTERNAL SIGNAL)

I/DCP INPUT

I/DOUT OUTPUT

FIGURE 3. TIMING DIAGRAM: I/DOUT IN-LOCK CONDITION

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