BQ294602_17 Datasheet, PDF (8/21 Pages) Texas Instruments – Single-Cell Protector for Li-Ion Batteries

bq294602, bq294604, bq294682, bq294624
SLUSAS0D – DECEMBER 2011 – REVISED APRIL 2017
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Feature Description (continued)
8.3.2 Output Drive, OUT
The gate of an external N-channel MOSFET is connected to this terminal. This output transitions to a high level
when an overvoltage condition is detected and after the programmed delay timer. The OUT will reset to a low
level if the cell voltage falls below the V_OV threshold before the fixed delay timer expires.
8.3.3 Supply Input, VDD
This terminal is the unregulated input power source for the IC. A series resistor is connected to limit the current,
and a capacitor is connected to ground for noise filtering.
8.3.4 Thermal Pad, PWRPAD
For correct operation, the power pad (PWRPAD) is connected to the V_SS terminal on the PCB.
8.4 Device Functional Modes
8.4.1 NORMAL Mode
When the cell voltage is below the overvoltage threshold, V_OV, the device operates in NORMAL mode. The OUT
pin is inactive and is low.
8.4.2 OVERVOLTAGE Mode
OVERVOLTAGE mode is detected if the cell voltage exceeds the overvoltage threshold, V_OV, for configured OV
delay time. The OUT pin is activated, internally pulled high, after a delay time, tDELAY. An external FET then
turns on, shorting the fuse to ground, which allows the battery and/or charger power to blow the fuse. When the
cell voltages fall below (VOV – VHYS), the device returns to NORMAL mode.
8.4.3 Customer Test Mode
Customer Test Mode (CTM) helps reduce test time for checking the overvoltage delay timer parameter once the
circuit is implemented in the battery pack. To enter CTM, VDD should be set to at least 10 V higher than V1 (see
Figure 6). The delay timer is greater than 10 ms, but considerably shorter than the timer delay in normal
operation. To exit CTM, remove the VDD to V1 voltage differential of 10 V so that the decrease in this value
automatically causes an exit.
CAUTION
Avoid exceeding any Absolute Maximum Voltages on any pins when placing the part
into CTM. Also avoid exceeding Absolute Maximum Voltage for the cell voltage
(V1–VSS). Stressing the pins beyond the rated limits may cause permanent damage to
the device.
Figure 6 shows the timing for the CTM.
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