TLV320AIC3107 Datasheet, PDF (78/102 Pages) Texas Instruments – LOW-POWER STEREO CODEC WITH INTEGRATED MONO CLASS-D SPEAKER AMPLIFIER

TLV320AIC3107
SLOS545D – NOVEMBER 2008 – REVISED DECEMBER 2014
www.ti.com
Table 115. Page 0 / Register 108:
Passive Analog Signal Bypass Selection During Powerdown
Register ⁽¹⁾
BIT READ/
WRITE
D7
R/W
D6
R/W
D5
R/W
D4
R/W
D3
R/W
D2
R/W
D1
R/W
D0
R/W
RESET
VALUE
0
0
0
0
0
0
0
0
DESCRIPTION
Reserved. Write only zero to this register bit.
LINE2RP Path Selection
0: Normal Signal Path
1: Signal is routed by a switch to RIGHT_LOP
Reserved. Write only zero to this register bit.
LINE1RP Path Selection
0: Normal Signal Path
1: Signal is routed by a switch to RIGHT_LOP
LINE2LM Path Selection
0: Normal Signal Path
1: Signal is routed by a switch to LEFT_LOM (Internal Signal)
LINE2LP Path Selection
0: Normal Signal Path
1: Signal is routed by a switch to LEFT_LOP
LINE1LM Path Selection
0: Normal Signal Path
1: Signal is routed by a switch to LEFT_LOM (Internal Signal)
LINE1LP Path Selection
0: Normal Signal Path
1: Signal is routed by a switch to LEFT_LOP
(1) Based on the setting above, if BOTH LINE1 and LINE2 inputs are routed to the output at the same time, then the two switches used for
the connection short the two input signals together on the output pins. The shorting resistance between the two input pins is two times
the bypass switch resistance (R_DS(on)). In general this condition of shorting should be avoided, as higher drive currents are likely to
occur on the circuitry that feeds these two input pins of this device.
BIT
D7-D6
D5-D0
Table 116. Page 0 / Register 109: DAC Quiescent Current Adjustment Register
READ/
WRITE
R/W
R/W
RESET
VALUE
00
000000
DESCRIPTION
DAC Current Adjustment
00: Default
01: 50% increase in DAC reference current
10: Reserved
11: 100% increase in DAC reference current
Reserved. Write only zero to these register bits.
BIT
D7-D0
READ/
WRITE
R
Table 117. Page 0 / Register 110–127: Reserved Registers
RESET
VALUE
00000000
DESCRIPTION
Reserved. Do not write to these registers.
BIT
D7-D1
D0
READ/
WRITE
X
R/W
Table 118. Page 1 / Register 0: Page Select Register
RESET
VALUE
0000000
0
DESCRIPTION
Reserved, write only zeros to these register bits
Page Select Bit
Writing zero to this bit sets Page-0 as the active page for following register accesses. Writing a one to
this bit sets Page-1 as the active page for following register accesses. It is recommended that the user
read this register bit back after each write, to ensure that the proper page is being accessed for future
register read/writes. This register has the same functionality on page-0 and page-1.
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