TLV320AIC3107 Datasheet, PDF (69/102 Pages) Texas Instruments – LOW-POWER STEREO CODEC WITH INTEGRATED MONO CLASS-D SPEAKER AMPLIFIER

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TLV320AIC3107
SLOS545D – NOVEMBER 2008 – REVISED DECEMBER 2014
BIT
D7
D6-D0
Table 88. Page 0 / Register 81: PGA_L to LEFT_LOP Volume Control Register
READ/
WRITE
R/W
R/W
RESET
VALUE
0
0000000
DESCRIPTION
PGA_L Output Routing Control
0: PGA_L is not routed to LEFT_LOP
1: PGA_L is routed to LEFT_LOP
PGA_L to LEFT_LOP Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 51
BIT
D7
D6-D0
Table 89. Page 0 / Register 82: DAC_L1 to LEFT_LOP Volume Control Register
READ/
WRITE
R/W
R/W
RESET
VALUE
0
0000000
DESCRIPTION
DAC_L1 Output Routing Control
0: DAC_L1 is not routed to LEFT_LOP
1: DAC_L1 is routed to LEFT_LOP
DAC_L1 to LEFT_LOP Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 51
BIT
D7
D6-D0
Table 90. Page 0 / Register 83: LINE2R to LEFT_LOP Volume Control Register
READ/
WRITE
R/W
R/W
RESET
VALUE
0
0000000
DESCRIPTION
LINE2R Output Routing Control
0: LINE2R is not routed to LEFT_LOP
1: LINE2R is routed to LEFT_LOP
LINE2R to LEFT_LOP Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 51
BIT
D7
D6-D0
Table 91. Page 0 / Register 84: PGA_R to LEFT_LOP Volume Control Register
READ/
WRITE
R/W
R/W
RESET
VALUE
0
0000000
DESCRIPTION
PGA_R Output Routing Control
0: PGA_R is not routed to LEFT_LOP
1: PGA_R is routed to LEFT_LOP
PGA_R to LEFT_LOP Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 51
BIT
D7
D6-D0
Table 92. Page 0 / Register 85: DAC_R1 to LEFT_LOP Volume Control Register
READ/
WRITE
R/W
R/W
RESET
VALUE
0
0000000
DESCRIPTION
DAC_R1 Output Routing Control
0: DAC_R1 is not routed to LEFT_LOP
1: DAC_R1 is routed to LEFT_LOP
DAC_R1 to LEFT_LOP Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 51
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