TPS650860 Datasheet, PDF (77/94 Pages) Texas Instruments – Configurable Multirail PMU for Multicore Processors

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TPS650860
SWCS128A – MARCH 2015 – REVISED DECEMBER 2015
6.1.1.2.2 Converter Design Procedure
Designing the converter has only two steps: design the output filter and select the input capacitors.
The converter must be supplied by a 5-V source. Figure 6-3 shows a diagram of the converter.
BUCK5V
C_IN
PVINx
Converter
L_OUT
LXx
FBx
V_OUT
C_OUT
Control
from SOC
Figure 6-3. Converter Diagram
6.1.1.2.2.1 Selecting the Inductor
It is required that an inductor be placed between the external FETs and the output capacitors. Together,
the inductor and output capacitors form a double pole in the control loop that contributes to stability. In
addition, the inductor is directly responsible for the output ripple, efficiency, and transient performance. As
the inductance used increases, the ripple current decreases, which typically results in an increase in
efficiency. However, with an increase in inductance used, the transient performance decreases. Finally,
the inductor selected must be rated for appropriate saturation current, core losses, and DC resistance
(DCR).
NOTE
Internal parameters for the converters are optimized for a 0.47 µH inductor, however it is
possible to use other inductor values as long as they are chosen carefully and thoroughly
tested.
Equation 7 shows the calculation for the recommended inductance for the converter.
V_OUT × (V_IN ± V_OUT)
L=
V_IN × f_SW × Iout_MAX × K_IND
where
•
•
•
•
•
V_OUT is the typical output voltage
V_IN is the typical input voltage
f_SW is the typical switching frequency
Iout_MAX is the maximum load current
K_IND is the ratio of I_Lripple to the I_out(max). For this application, TI recommends that K_IND is set to a value from 0.2
to 0.4.
(7)
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