ADC31RF80 Datasheet, PDF (76/136 Pages) Texas Instruments – 3-GSPS Telecom Receiver and Feedback Device

ADC31RF80
SBAS860 – AUGUST 2017
8.5.2 Register Descriptions
Table 30 lists the access codes for the ADC31RF80 registers.
Table 30. ADC31RF80 Access Type Codes
Access Type
R
R-W
W
-n
Code
R
R/W
W
Description
Read
Read or Write
Write
Value after reset or the default
value
8.5.2.1 General Registers
8.5.2.1.1 Register 000h (address = 000h), General Registers
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7
RESET
R/W-0h
6
0
W-0h
5
0
W-0h
Figure 144. Register 000h
4
0
W-0h
3
0
W-0h
2
0
W-0h
1
0
W-0h
0
RESET
R/W-0h
Table 31. Register 000h Field Descriptions
Bit Field
7
RESET
6-1 0
0
RESET
Type
R/W
W
R/W
Reset
0h
0h
0h
Description
0 = Normal operation
1 = Internal software reset, clears back to 0
Must write 0
0 = Normal operation⁽¹⁾
1 = Internal software reset, clears back to 0
(1) Both bits (7, 0) must be set simultaneously to perform a reset.
8.5.2.1.2 Register 002h (address = 002h), General Registers
Figure 145. Register 002h
7
6
5
4
3
2
1
0
DIGITAL BANK PAGE SEL[7:0]
R/W-0h
Table 32. Register 002h Field Descriptions
Bit Field
7-0 DIGITAL BANK PAGE SEL[7:0]
Type
R/W
Reset
0h
Description
Program the JESD BANK PAGE SEL[23:0] bits to access the
desired page in the JESD bank.
680000h = Main digital page
610000h = Digital function page
690000h = JESD digital page selected
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