TMS320TCI6484CMH Datasheet, PDF (75/242 Pages) Texas Instruments – Communications Infrastructure Digital Signal Processor

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5 C64x+ Megamodule
TMS320TCI6484
Communications Infrastructure Digital Signal Processor
SPRS438E—October 2009
The C64x+ Megamodule consists of several components:
• The C64x+ CPU and associated C64x+ Megamodule core
• Level-one and level-two memories (L1P, L1D, L2)
• RSA accelerator
• Interrupt controller
• Power-down controller
• External memory controller
• A dedicated power/sleep controller (LPSC)
The C64x+ Megamodule also provides support for memory protection and bandwidth management (for resources
local to the C64x+ Megamodule). Figure 5-1 shows a block diagram of the C64x+ Megamodule.
Figure 5-1 64x+ Megamodule Block Diagram
32KB L1P
Memory Controller (PMC) With
Memory Protect/Bandwidth Mgmt
Boot
Controller
PLLC
LPSC
GPSC
C64x+ DSP Core
Instruction Fetch
16-/32-bit Instruction Dispatch
Control Registers
In-Circuit Emulation
Instruction Decode
Data Path A
Data Path B
A Register File
A31-A16
A15-A0
B Register File
B31-B16
B15-B0
.M1
.L1 .S1 xx .D1
xx
.M2
.D2 xx .S2 .L2
xx
L2 Cache/
SRAM
2048KB
DMA Switch
Fabric
Data Memory Controller (DMC) With
Memory Protect/Bandwidth Mgmt
RSA
32KB L1D
RSA
CFG Switch
Fabric
Copyright © 2009 Texas Instruments Incorporated
C64x+ Megamodule 75