LMK0482X Datasheet, PDF (73/114 Pages) Texas Instruments – JEDEC JESD204B Support

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LMK04821, LMK04826, LMK04828
SNAS605AQ – MARCH 2013 – REVISED AUGUST 2014
9.7.4.4 SDIO_RDBK_TYPE, CLKin_SEL1_MUX, CLKin_SEL1_TYPE
This register has CLKin_SEL1 controls and register readback SDIO pin type.
Register 0x149
Bit
Name
POR Default Description
7
NA
0
Reserved
6 SDIO_RDBK_TYPE
Sets the SDIO pin to open drain when during SPI readback in 3 wire mode.
1
0: Output, push-pull
1: Output, open drain.
This set the output value of the CLKin_SEL1 pin. This register only applies if
CLKin_SEL1_TYPE is set to an output mode.
Field Value
Output Format
0 (0x00)
Logic Low
1 (0x01)
CLKin1 LOS
5:3 CLKin_SEL1_MUX
0
2 (0x02)
3 (0x03)
CLKin1 Selected
DAC Locked
4 (0x04)
DAC Low
5 (0x05)
DAC High
6 (0x06)
SPI Readback
7 (0x07)
Reserved
This sets the IO type of the CLKin_SEL1 pin.
Field Value
Configuration
Function
2:0 CLKin_SEL1_TYPE
2
0 (0x00)
1 (0x01)
2 (0x02)
Input
Input /w pull-up resistor
Input /w pull-down resistor
Input mode, see Input Clock
Switching - Pin Select Mode for
description of input mode.
3 (0x03)
4 (0x04)
5 (0x05)
6 (0x06)
Output (push-pull)
Output inverted (push-pull)
Reserved
Output (open drain)
Output modes; see the
CLKin_SEL1_MUX register for
description of outputs.
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