LM3S9U92 Datasheet, PDF (729/1407 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S9U92 Microcontroller
Bit/Field
12:11
10
9
8
7
6
Name
reserved
OERIS
BERIS
PERIS
FERIS
RTRIS
Type
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
UART Overrun Error Raw Interrupt Status
Value Description
1 An overrun error has occurred.
0 No interrupt
This bit is cleared by writing a 1 to the OEIC bit in the UARTICR register.
UART Break Error Raw Interrupt Status
Value Description
1 A break error has occurred.
0 No interrupt
This bit is cleared by writing a 1 to the BEIC bit in the UARTICR register.
UART Parity Error Raw Interrupt Status
Value Description
1 A parity error has occurred.
0 No interrupt
This bit is cleared by writing a 1 to the PEIC bit in the UARTICR register.
UART Framing Error Raw Interrupt Status
Value Description
1 A framing error has occurred.
0 No interrupt
This bit is cleared by writing a 1 to the FEIC bit in the UARTICR register.
UART Receive Time-Out Raw Interrupt Status
Value Description
1 A receive time out has occurred.
0 No interrupt
This bit is cleared by writing a 1 to the RTIC bit in the UARTICR register.
January 22, 2012
729
Texas Instruments-Production Data