English
Language : 

DP83849IF_14 Datasheet, PDF (72/104 Pages) Texas Instruments – PHYTER™ DUAL Industrial Temperature with Fiber Support (FX) and Flexible Port Switching Dual Port 10/100 Mb/s Ethernet Physical Layer Tranceiver
DP83849IF
SNOSAX8C – JUNE 2008 – REVISED APRIL 2009
www.ti.com
Register Name Addr
LED Direct Control 18h
Register
PHY Control
19h
Register
10Base-T
Status/Control
Register
CD Test Control
and BIST
Extensions
Register
Phy Control
Register 2
Energy Detect
Control Register
RESERVED
1Ah
1Bh
1Ch
1Dh
1Eh-1Fh
RESERVED
14h-1Fh
100Mb Length
14h
Detect Register
100Mb Frequency 15h
Offset Indication
Register
TDR Control
16h
Register
TDR Window
17h
Register
TDR Peak
18h
Register
TDR Threshold 19h
Register
Variance Control 1Ah
Register
Variance Data
1Bh
Register
RESERVED
1Ch
Link Quality
1Dh
Monitor Register
Link Quality Data 1Eh
Register
RESERVED
1Fh
Table 9-2. Register Table (continued)
Tag
LEDCR
Bit 15
Reserved
PHYCR MDIX_EN
10BT_SER Reserved
IAL
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved Reserved Reserved Reserved Reserved Reserved LEDACT_R BLINK_FR BLINK_FR DRV_SPDLE DRV_LNKL DRV_ACTLE SPDLED
X
EQ
EQ
D
ED
D
LNKLED
ACTLED
FORCE_M PAUSE_R PAUSE_TX BIST_FE
DIX
X
PSR_15
BIST_ BIST_STA BP_STRET LED_
RT
STATUS
CH
CNFG[1]
LED_
CNFG[0]
PHY
ADDR
PHY
ADDR
PHY
ADDR
PHY
ADDR
PHY
ADDR
Reserved Reserved Reserved SQUELCH SQUELCH SQUELCH LOOPBAC LP_DIS
K_10_DIS
FORCE_
LINK_10
Reserved POLARITY Reserved
Reserved HEARTBEAT JABBER_D
_DIS
IS
CDCTRL1 BIST_ERR BIST_ERR BIST_ERR BIST_ERR BIST_ERR BIST_ERR BIST_ERR BIST_ERR Reserved
OR_COUN OR_COUN OR_COUN OR_COUN OR_COUN OR_COUN OR_COUN OR_COUN
T
T
T
T
T
T
T
T
Reserved BIST_CONT_ CDPattEN_
MODE
10
Reserved
10Meg_Pat CDPattSel
t_Gap
CDPattSel
PHYCR2 Reserved Reserved Reserved Reserved Reserved Reserved SOFT_RE Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
SET
EDCR
ED_EN
ED_AUTO ED_AUTO ED_MAN ED_BURS ED_PWR_ ED_ERR_ ED_DATA_ ED_ERR_ ED_ERR_ ED_ERR_CO ED_ERR_ ED_DATA_C ED_DATA_ ED_DATA_C ED_DATA_
_UP
_DOWN
T_DIS STATE
MET
MET COUNT COUNT UNT
COUNT
OUNT
COUNT
OUNT
COUNT
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
RESERVED REGISTERS
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
LINK DIAGNOSTICS REGISTERS - PAGE 2
LEN100_D Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved CABLE_LE CABLE_LE CABLE_LEN CABLE_LE CABLE_LEN CABLE_LE CABLE_LEN CABLE_LE
ET
N
N
N
N
N
FREQ100 SAMPLE_F Reserved Reserved Reserved Reserved Reserved Reserved SEL_FC FREQ_OF FREQ_OF FREQ_OFFS FREQ_OF FREQ_OFFS FREQ_OF FREQ_OFFS FREQ_OF
REQ
FSET
FSET
ET
FSET
ET
FSET
ET
FSET
TDR_CTRL TDR_ENA TDR_100M TX_CHAN RX_CHAN SEND_TD TDR_WIDT TDR_WIDT TDR_WIDT TDR_MIN_ Reserved RX_THRESH RX_THRE RX_THRESH RX_THRE RX_THRESH RX_THRE
BLE
b
NEL
NEL
R
H
H
H
MODE
OLD
SHOLD
OLD
SHOLD
OLD
SHOLD
TDR_WIN TDR_STA TDR_STA TDR_STA TDR_STA TDR_STA TDR_STA TDR_STA TDR_STA TDR_STO TDR_STO TDR_STOP TDR_STO TDR_STOP TDR_STO TDR_STOP TDR_STO
RT
RT
RT
RT
RT
RT
RT
RT
P
P
P
P
P
TDR_PEA Reserved Reserved TDR_PEA TDR_PEA TDR_PEA TDR_PEA TDR_PEA TDR_PEA TDR_PEA TDR_PEA TDR_PEAK_ TDR_PEA TDR_PEAK_ TDR_PEA TDR_PEAK_ TDR_PEA
K
K
K
K
K
K
K
K_TIME K_TIME
TIME
K_TIME
TIME
K_TIME
TIME
K_TIME
TDR_THR Reserved Reserved Reserved Reserved Reserved Reserved Reserved TDR_THR_ TDR-
TDR-
TDR-
TDR-
TDR-
TDR-
TDR-
TDR-
MET THR_TIME THR_TIME THR_TIME THR_TIME THR_TIME THR_TIME THR_TIME THR_TIME
VAR_CTRL VAR_RDY Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved VAR_FREEZ VAR_TIME VAR_TIMER VAR_TIME
E
R
R
VAR_DAT VAR_DAT VAR_DAT VAR_DAT VAR_DAT VAR_DAT VAR_DAT VAR_DAT VAR_DAT VAR_DAT VAR_DAT VAR_DATA VAR_DAT VAR_DATA VAR_DAT VAR_DATA VAR_DAT
A
A
A
A
A
A
A
A
A
A
A
A
A
A
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
LQMR
LQM_ENA Reserved Reserved Reserved Reserved Reserved FC_HI_WA FC_LO_W FREQ_HI_ FREQ_LO_ DBLW_HI_W DBLW_LO DAGC_HI_W DAGC_LO C1_HI_WAR C1_LO_W
BLE
RN
ARN WARN
WARN
ARN
_WARN
ARN
_WARN
N
ARN
LQDR
Reserved Reserved SAMPLE_ WRITE_LQ LQ_PARA LQ_PARA LQ_PARA LQ_THR_S LQ_THR_D LQ_THR_D LQ_THR_DA LQ_THR_D LQ_THR_DA LQ_THR_D LQ_THR_DA LQ_THR_D
PARAM
_THR
M_SEL M_SEL M_SEL
EL
ATA
ATA
TA
ATA
TA
ATA
TA
ATA
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
72
Register Block
Submit Documentation Feedback
Product Folder Links: DP83849IF
Copyright © 2008–2009, Texas Instruments Incorporated