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TMS320F28035_13 Datasheet, PDF (70/157 Pages) Texas Instruments – Piccolo Microcontrollers
TMS320F28030, TMS320F28031, TMS320F28032
TMS320F28033, TMS320F28034, TMS320F28035
SPRS584I – APRIL 2009 – REVISED JULY 2012
www.ti.com
The registers in Table 4-9 configure and control the operation of the LIN module.
Table 4-9. LIN-A Registers(1)
NAME
ADDRESS
SIZE (x16)
DESCRIPTION
SCIGCR0
0x6C00
2
Global Control Register 0
SCIGCR1
0x6C02
2
Global Control Register 1
SCIGCR2
0x6C04
2
Global Control Register 2
SCISETINT
0x6C06
2
Interrupt Enable Register
SCICLEARINT
0x6C08
2
Interrupt Disable Register
SCISETINTLVL
0x6C0A
2
Set Interrupt Level Register
SCICLEARINTLVL
0x6C0C
2
Clear Interrupt Level Register
SCIFLR
0x6C0E
2
Flag Register
SCIINTVECT0
0x6C10
2
Interrupt Vector Offset Register 0
SCIINTVECT1
0x6C12
2
Interrupt Vector Offset Register 1
SCIFORMAT
0x6C14
2
Length Control register
BRSR
0x6C16
2
Baud Rate Selection Register
SCIED
0x6C18
2
Emulation buffer register
SCIRD
0x6C1A
2
Receiver data buffer register
SCITD
0x6C1C
2
Transmit data buffer register
Reserved
0x6C1E
4
RSVD
SIPIO2
0x6C22
2
Pin control register 2
Reserved
0x6C24
10
RSVD
LINCOMP
0x6C30
2
Compare register
LINRD0
0x6C32
2
Receive data register 0
LINRD1
0x6C34
2
Receive data register 1
LINMASK
0x6C36
2
Acceptance mask register
LINID
0x6C38
2
Register containing ID- byte, ID-SlaveTask byte, and ID
received fields.
LINTD0
0x6C3A
2
Transmit Data Register 0
LINTD1
0x6C3C
2
Transmit Data Register 1
MBRSR
0x6C3E
2
Baud Rate Selection Register
Reserved
0x6C40
8
RSVD
IODFTCTRL
0x6C48
2
IODFT for BLIN
(1) Some registers and some bits in other registers are EALLOW-protected. See the TMS320x2803x Piccolo Local Interconnect Network
(LIN) Module Reference Guide (literature number SPRUGE2) for more details.
70
Peripherals
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