THS4521 Datasheet, PDF (7/65 Pages) Texas Instruments – VERY LOW POWER, NEGATIVE RAIL INPUT, RAIL-TO-RAIL OUTPUT, FULLY DIFFERENTIAL AMPLIFIER

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7 Specifications
THS4521, THS4522, THS4524
SBOS458H – DECEMBER 2008 – REVISED JUNE 2015
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted).⁽¹⁾
Supply voltage, V_S– to V_S+
Input/output voltage, V_I (V_IN±, V_OUT±, V_OCM pins)
Differential input voltage, V_ID
Output current, I_O
Input current, I_I (V_IN±, V_OCM pins)
Continuous power dissipation
Maximum junction temperature, T_J
Maximum junction temperature, T_J (continuous operation, long-term reliability)
Operating free-air temperature, T_A
Storage temperature, T_stg
MIN
MAX
5.5
(V_S–) – 0.7
(V_S+) + 0.7
1
100
10
See Thermal Information table
150
125
–40
85
–65
150
UNIT
V
V
V
mA
mA
°C
°C
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
V_(ESD)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾
Machine model (MM)
VALUE
±1300
±1000
±50
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
V_S+ single-supply voltage
T_A Ambient temperature
MIN
NOM
MAX UNIT
2.7
5.0
5.4
V
–40
25
85
°C
7.4 Thermal Information
THERMAL METRIC⁽¹⁾
THS4521
D
DGK
THS4522
PW
THS4524
DBT
UNIT
8 PINS 8 PINS 16 PINS 38 PINS
R_θJA Junction-to-ambient thermal resistance
R_θJC(top) Junction-to-case (top) thermal resistance
R_θJB Junction-to-board thermal resistance
ψ_JT
Junction-to-top characterization parameter
ψ_JB
Junction-to-board characterization parameter
R_θJC(bot) Junction-to-case (bottom) thermal resistance
127.8
81.8
68.3
32.2
67.8
N/A
193.8
84.1
115.3
17.9
113.6
N/A
124.2
62.8
68.5
15.8
68
N/A
106.2
60.9
65.5
18.5
65.1
N/A
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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