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THS4521 Datasheet, PDF (2/65 Pages) Texas Instruments – VERY LOW POWER, NEGATIVE RAIL INPUT, RAIL-TO-RAIL OUTPUT, FULLY DIFFERENTIAL AMPLIFIER
THS4521, THS4522, THS4524
SBOS458H – DECEMBER 2008 – REVISED JUNE 2015
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Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Device Comparison Table..................................... 3
6 Pin Configuration and Functions ......................... 4
7 Specifications......................................................... 7
7.1 Absolute Maximum Ratings ...................................... 7
7.2 ESD Ratings ............................................................ 7
7.3 Recommended Operating Conditions....................... 7
7.4 Thermal Information .................................................. 7
7.5 Electrical Characteristics: VS+ – VS– = 3.3 V ............ 8
7.6 Electrical Characteristics: VS+ – VS– = 5 V ............. 10
7.7 Typical Characteristics ............................................ 12
7.8 Typical Characteristics: VS+ – VS– = 3.3 V.............. 14
7.9 Typical Characteristics: 5 V .................................... 19
8 Detailed Description ............................................ 24
8.1 Overview ................................................................. 24
8.2 Functional Block Diagram ....................................... 25
8.3 Feature Description................................................. 25
8.4 Device Functional Modes........................................ 34
8.5 Programming........................................................... 40
9 Application and Implementation ........................ 41
9.1 Application Information............................................ 41
9.2 Typical Applications ............................................... 41
10 Power Supply Recommendations ..................... 51
11 Layout................................................................... 51
11.1 Layout Guidelines ................................................. 51
11.2 Layout Example .................................................... 52
12 Device and Documentation Support ................. 53
12.1 Device Support...................................................... 53
12.2 Related Links ........................................................ 53
12.3 Community Resources.......................................... 53
12.4 Trademarks ........................................................... 53
12.5 Electrostatic Discharge Caution ............................ 53
12.6 Glossary ................................................................ 53
13 Mechanical, Packaging, and Orderable
Information ........................................................... 53
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (December 2014) to Revision H
Page
• Changed capacitor units in front page diagram from mF to µF (typo) ................................................................................... 1
• Changed RF and RG unit in front page FFT plot from kW to kΩ (typo)................................................................................. 1
• Changed Absolute Maximum Ratings minimum storage temperature value from 65 to –65 (typo) ..................................... 7
• Added Community Resources section ................................................................................................................................. 53
Changes from Revision F (September 2011) to Revision G
Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Revision E (December 2010) to Revision F
Page
• Changed Input Offset Current values in 3.3 V Electrical Characteristics ............................................................................... 8
• Changed Input Offset Current Drift values in 3.3 V Electrical Characteristics ....................................................................... 8
• Changed Input Offset Current values in 5 V Electrical Characteristics ................................................................................ 11
• Changed Input Offset Current Drift values in 5 V Electrical Characteristics ........................................................................ 11
• Changed R41 and R42 in Figure 79..................................................................................................................................... 42
Changes from Revision D (August 2010) to Revision E
Page
• Changed test level indication for 5-V input offset voltage drift from B to C.......................................................................... 10
2
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