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SN74CB3Q3125_15 Datasheet, PDF (7/26 Pages) Texas Instruments – Quadruple FET Bus Switch
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7 Parameter Measurement Information
Input Generator
50 Ω
VG1
VIN
50 Ω
VCC
DUT
Input Generator
50 Ω
VG2
VI
50 Ω
SN74CB3Q3125
SCDS143C – OCTOBER 2003 – REVISED JUNE 2015
TEST CIRCUIT
VO
CL
(see Note A)
RL
RL
2 × VCC
S1
Open
GND
TEST
tpd(s)
tPLZ/tPZL
tPHZ/tPZH
VCC
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
S1
Open
Open
2 × VCC
2 × VCC
GND
GND
RL
500 Ω
500 Ω
500 Ω
500 Ω
500 Ω
500 Ω
VI
VCC or GND
VCC or GND
GND
GND
VCC
VCC
CL
30 pF
50 pF
30 pF
50 pF
30 pF
50 pF
V∆
0.15 V
0.3 V
0.15 V
0.3 V
Output
Control
(VIN)
VCC/2
VCC/2
VCC
0V
Output
Control
(VIN)
VCC/2
VCC
VCC/2
0V
tPLH
tPHL
Output
VCC/2
VOH
VCC/2
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELA Y TIMES (tpd(s) )
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
tPZL
tPLZ
tPZH
VCC/2
VCC
VOL + V∆
VOL
tPHZ
VCC/2
VOH
VOH − V∆
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the
output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO = 50 Ω, tr ≤2.5 ns,
tf ≤2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd(s). The tpd propagation delay is the calculated RC time constant of the typical ON-
state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output
impedance).
H. All parameters and waveforms are not applicable to all devices.
Figure 3. Test Circuit and Voltage Waveforms
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