SN74ACT72211L Datasheet, PDF (7/21 Pages) Texas Instruments – SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES

SN74ACT72211L, SN74ACT72221L, SN74ACT72231L, SN74ACT72241L
512 × 9, 1024 × 9, 2048 × 9, AND 4096 × 9
SYNCHRONOUS FIRSTĆIN, FIRSTĆOUT MEMORIES
SCAS222 − FEBRUARY 1993 − REVISED JUNE 1993
tw(RS)
RS
RWREEENNN^{ÏÏÏÏÏ}121, ^{ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ}
tsu(RS)
tsu(RS)
WEN2/LD
ÎÎÎÎÎÎÎÎÎÎÎÎ _{(see Note A)}
tsu(RS)
EF,PA^ÌÌE ^{ÌÌÌÌÌÌÌÌÌÌÌÌtpÌÌd(RÌÌS-OÌÌ) ÌÌÌÌÌÌ}
FF,PA^ÏÏF ^{ÏÏÏÏÏÏÏÏÏÏÏÏtpÏÏd(RSÏÏ-O)ÏÏÏÏÏÏÏÏ}
Q0−Q^ÌÌ8 ^{ÌÌÌÌÌÌÌÌÌÌÌÌtpÌÌd(RÌÌS-O)ÌÌÌÌÌÌÌÌ}
th(RS)
th(RS)
th(RS)
See Note B
NOTES: A. Holding WEN2/LD high during reset makes it act as a second write enable. Holding WEN2/LD low during reset makes it act as a
load enable for the programmable flag offset registers.
B. After reset, the outputs are low if OE is low and at the high-impedance level if OE is high.
C. The clocks (RCLK, WCLK) can be free running during reset.
Figure 2. Reset Timing
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