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SM74202 Datasheet, PDF (7/12 Pages) Texas Instruments – 100V Current Mode PWM Controller
SM74202
www.ti.com
SNOSBA4A – NOVEMBER 2011 – REVISED APRIL 2013
DETAILED OPERATING DESCRIPTION
The SM74202 High Voltage PWM controller contains all of the features needed to implement single ended
primary power converter topologies. The SM74202 includes a high-voltage startup regulator that operates over a
wide input range to 100V. The PWM controller is designed for high speed capability including an oscillator
frequency range to 1MHz and total propagation delays less than 100ns. Additional features include an error
amplifier, precision reference, line under-voltage lockout, cycle-by-cycle current limit, softstart, oscillator sync
capability and thermal shutdown. The functional block diagram of theSM74202 is shown in the Block Diagram.
The SM74202 is designed for current-mode control power converters, which require a single drive output, such
as Flyback and Forward topologies. The SM74202 provides all of the advantages of current-mode control
including line feed-forward, cycle-by-cycle current limiting and simplified loop compensation .
High Voltage Start-Up Regulator
The SM74202 contains an internal high voltage startup regulator, that allows the input pin (Vin) to be connected
directly to line voltages as high as 100V. The regulator output is internally current limited to 15mA. When power
is applied, the regulator is enabled and sources current into an external capacitor connected to the VCC pin. The
recommended capacitance range for the Vcc regulator is 0.1µF to 100µF. When the voltage on the VCC pin
reaches the regulation level of 7.7V, the controller output is enabled. The controller will remain enabled until VCC
falls below 6V.
In typical applications, a transformer auxiliary winding is connected through a diode to the VCC pin. This winding
should raise the VCC voltage above 8V to shut off the internal startup regulator. Powering VCC from an auxiliary
winding improves conversion efficiency while reducing the power dissipated in the controller. The external VCC
capacitor must be selected such that the capacitor maintains the Vcc voltage greater than the VCC UVLO falling
threshold (6V) during the initial start-up. During a fault condition when the converter auxiliary winding is inactive,
external current draw on the VCC line should be limited such that the power dissipated in the start-up regulator
does not exceed the maximum power dissipation capability of the controller.
An external start-up or other bias rail can be used instead of the internal start-up regulator by connecting the VCC
and the Vin pins together and feeding the external bias voltage (8-15V) to the two pins.
Line Under Voltage Detector
The SM74202 contains a line Under Voltage Lock Out (UVLO) circuit. An external set-point voltage divider from
Vin to GND sets the operational range of the converter. The resistor divider must be designed such that the
voltage at the UVLO pin is greater than 1.25V when Vin is in the desired operating range. If the under voltage
threshold is not met, all functions of the controller are disabled and the controller remains in a low power standby
state.
UVLO hysteresis is accomplished with an internal 20µA current source that is switched on or off into the
impedance of the set-point divider. When the UVLO threshold is exceeded, the current source is activated to
instantly raise the voltage at the UVLO pin. When the UVLO pin voltage falls below the 1.25V threshold the
current source is turned off, causing the voltage at the UVLO pin to fall. The UVLO pin can also be used to
implement a remote enable / disable function. If an external transistor pulls the UVLO pin below the 1.25V
threshold, the converter is disabled.
Error Amplifier
An internal high gain error amplifier is provided within the SM74202. The amplifier's non-inverting input is
internally set to a fixed reference voltage of 1.25V. The inverting input is connected to the FB pin. In non-isolated
applications, the power converter output is connected to the FB pin via voltage scaling resistors. Loop
compensation components are connected between the COMP and FB pins. For most isolated applications the
error amplifier function is implemented on the secondary side of the converter and the internal error amplifier is
not used. The internal error amplifier is configured as an open drain output and can be disabled by connecting
the FB pin to ground. An internal 5K pull-up resistor between a 5V reference and COMP can be used as the pull-
up for an optocoupler in isolated applications.
Copyright © 2011–2013, Texas Instruments Incorporated
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