MSP430G2231-EP_16 Datasheet, PDF(7/46 Page) Texas Instruments

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MSP430G2231-EP_16 Datasheet, PDF (7/46 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

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MSP430G2231-EP

www.ti.com

SLAS862 â JUNE 2012

Interrupt Vector Addresses

The interrupt vectors and the power-up starting address are located in the address range 0FFFFh to 0FFC0h.

The vector contains the 16-bit address of the appropriate interrupt handler instruction sequence.

If the reset vector (located at address 0FFFEh) contains 0FFFFh (for example, flash is not programmed) the

CPU goes into LPM4 immediately after power-up.

Table 6. Interrupt Sources, Flags, and Vectors

INTERRUPT SOURCE

Power-Up

External Reset

Watchdog Timer+

Flash key violation

PC out-of-range(1)

NMI

Oscillator fault

Flash memory access violation

Watchdog Timer+

Timer_A2

ADC10

USI

I/O Port P2 (two flags)

I/O Port P1 (eight flags)

See (5)

INTERRUPT FLAG

PORIFG

RSTIFG

WDTIFG

KEYV (2)

NMIIFG

OFIFG

ACCVIFG (2) (3)

WDTIFG

TACCR0 CCIFG(4)

TACCR1 CCIFG, TAIFG(2)(4)

ADC10IFG (4)

USIIFG, USISTTIFG(2)(4)

P2IFG.6 to P2IFG.7(2)(4)

P1IFG.0 to P1IFG.7(2)(4)

SYSTEM

INTERRUPT

WORD

ADDRESS

PRIORITY

Reset

0FFFEh

31, highest

(non)-maskable

maskable

0FFFCh

0FFFAh

0FFF8h

0FFF6h

0FFF4h

0FFF2h

0FFF0h

0FFEEh

0FFECh

0FFEAh

0FFE8h

0FFE6h

0FFE4h

0FFE2h

0FFE0h

0FFDEh to

0FFC0h

15 to 0, lowest

(1) A reset is generated if the CPU tries to fetch instructions from within the module register memory address range (0h to 01FFh) or from

within unused address ranges.

(2) Multiple source flags

(3) (non)-maskable: the individual interrupt-enable bit can disable an interrupt event, but the general interrupt enable cannot.

(4) Interrupt flags are located in the module.

(5) The interrupt vectors at addresses 0FFDEh to 0FFC0h are not used in this device and can be used for regular program code if

necessary.

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