MSP430G2231-EP_16 Datasheet, PDF (4/46 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430G2231-EP
SLAS862 – JUNE 2012
www.ti.com
Table 3. Terminal Functions
TERMINAL
NAME
NO.
P1.0/
TA0CLK/
ACLK/
2
A0
P1.1/
TA0.0/
3
A1
P1.2/
TA0.1/
4
A2
P1.3/
ADC10CLK/
A3/
5
VREF-/VEREF
P1.4/
SMCLK/
A4/
6
VREF+/VEREF+/
TCK
P1.5/
TA0.0/
A5/
7
SCLK/
TMS
P1.6/
TA0.1/
A6/
SDO/
8
SCL/
TDI/TCLK
P1.7/
A7/
SDI/
9
SDA/
TDO/TDI ⁽²⁾
XIN/
P2.6/
13
TA0.1
XOUT/
P2.7
12
RST/
NMI/
10
SBWTDIO
TEST/
SBWTCK
11
DVCC
1
DVSS
14
QFN Pad
-
I/O
DESCRIPTION
General-purpose digital I/O pin
I/O
Timer0_A, clock signal TACLK input
ACLK signal output
ADC10 analog input A0⁽¹⁾
General-purpose digital I/O pin
I/O Timer0_A, capture: CCI0A input, compare: Out0 output
ADC10 analog input A1⁽¹⁾
General-purpose digital I/O pin
I/O Timer0_A, capture: CCI1A input, compare: Out1 output
ADC10 analog input A2⁽¹⁾
General-purpose digital I/O pin
I/O
ADC10, conversion clock output⁽¹⁾
ADC10 analog input A3⁽¹⁾
ADC10 negative reference voltage⁽¹⁾
General-purpose digital I/O pin
SMCLK signal output
I/O ADC10 analog input A4⁽¹⁾
ADC10 positive reference voltage⁽¹⁾
JTAG test clock, input terminal for device programming and test
General-purpose digital I/O pin
Timer0_A, compare: Out0 output
I/O ADC10 analog input A5⁽¹⁾
USI: clock input in I2C mode; clock input/output in SPI mode
JTAG test mode select, input terminal for device programming and test
General-purpose digital I/O pin
Timer0_A, capture: CCI1A input, compare: Out1 output
I/O
ADC10 analog input A6⁽¹⁾
USI: Data output in SPI mode
USI: I2C clock in I2C mode
JTAG test data input or test clock input during programming and test
General-purpose digital I/O pin
ADC10 analog input A7⁽¹⁾
I/O USI: Data input in SPI mode
USI: I2C data in I2C mode
JTAG test data output terminal or test data input during programming and test
Input terminal of crystal oscillator
I/O General-purpose digital I/O pin
Timer0_A, compare: Out1 output
I/O
Output terminal of crystal oscillator⁽³⁾
General-purpose digital I/O pin
Reset
I Nonmaskable interrupt input
Spy-Bi-Wire test data input/output during programming and test
I
Selects test mode for JTAG pins on Port 1. The device protection fuse is connected to TEST.
Spy-Bi-Wire test clock input during programming and test
NA Supply voltage
NA Ground reference
NA QFN package pad connection to V_SS recommended.
(1) MSP430G2x31 only
(2) TDO or TDI is selected via JTAG instruction.
(3) If XOUT/P2.7 is used as an input, excess current will flow until P2SEL.7 is cleared. This is due to the oscillator output driver connection
to this pad after reset.
4
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