LMH0346 Datasheet, PDF (7/23 Pages) Texas Instruments – HD/SD SDI Reclocker with Dual Differential Outputs

LMH0346
www.ti.com
SNLS248J – APRIL 2007 – REVISED APRIL 2013
AC ELECTRICAL CHARACTERISTICS
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.⁽¹⁾
Symbol
Parameter
Conditions
Reference
Min
BR_SD
BR_SD
Serial Data Rate
Serial Data Rate
SMPTE 259M, C
SMPTE 292M
SDI, SDO
BR_SD Serial Data Rate
SMPTE 424M
TOL_JIT
TOL_JIT
TOL_JIT
TOL_JIT
TOL_JIT
TOL_JIT
t_JIT
t_JIT
t_JIT
BW_LOOP
F_CO
F_CO
F_CO
F_CO
F_CO
t_JIT
T_ACQ
t_r, t_f
Serial Input Jitter
Tolerance
Serial Input Jitter
Tolerance
Serial Input Jitter
Tolerance
Serial Input Jitter
Tolerance
Serial Input Jitter
Tolerance
Serial Input Jitter
Tolerance
Serial Data Output Jitter
Serial Data Output Jitter
Serial Data Output Jitter
Loop Bandwidth
Serial Clock Output
Frequency
Serial Clock Output
Frequency
Serial Clock Output
Frequency
Serial Clock Output
Frequency
Serial Clock Output
Frequency
Serial Clock Output Jitter
Serial Clock Output
Alignment with respect to
Data Interval
Serial Clock Output Duty
Cycle
Acquisition Time
Input rise/fall time
270 Mbps ^{(2) (3) (4)}
SDI
270 Mbps ^{(2) (3) (5)}
1483 or 1485 Mbps^(2)(3)(4)
1483 or 1485 Mbps^(2)(3)(5)
2967 or 2970 Mbps^(2)(3)(4)
2967 or 2970 Mbps^(2)(3)(5)
270 Mbps⁽³⁾⁽⁶⁾
1483 or 1485 Mbps⁽³⁾⁽⁷⁾
2967 or 2970 Mbps⁽³⁾⁽⁸⁾
270 Mbps,
<0.1dB Peaking
1485 Mbps,
<0.1dB Peaking
2970 Mbps,
<0.1dB Peaking
270 Mbps data rate
SDO
SCO
1483 Mbps data rate
1485 Mbps data rate
2967 Mbps data rate
2970 Mbps data rate
See ⁽³⁾
See ⁽³⁾
See ⁽⁹⁾
10%–90%
SDO, SCO
SCO
Logic inputs
>6
>0.6
>6
>0.6
>6
>0.6
40
45
Typ
270
1483,
1485
2967,
2970
0.01
0.03
0.06
275
1.5
2.75
270
1483
1485
2967
2970
2
1.5
Max
0.03
0.04
0.08
3
60
55
15
Units
Mbps
Mbps
Mbps
UI_P-P
UI_P-P
UI_P-P
UI_P-P
UI_P-P
UI_P-P
UI_P-P
UI_P-P
UI_P-P
kHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ps_RMS
%
%
ms
ns
(1) Typical values are stated for: V_CC = +3.3V, T_A = +25°C.
(2) Peak-to-peak amplitude with sinusoidal modulation per SMPTE RP 184-1996 paragraph 4.1. The test data signal shall be color bars.
(3) This parameter is ensured by characterization over voltage and temperature limits.
(4) Refer to “A1” in Figure 1 of SMPTE RP 184-1996.
(5) Refer to “A2” in Figure 1 of SMPTE RP 184-1996.
(6) PRBS 2¹⁰−1, input jitter = 31 ps_P-P
(7) PRBS 2¹⁰−1, input jitter = 24 ps_P-P
(8) PRBS 2¹⁰−1, input jitter = 22 ps_P-P
(9) Measured from first SDI transition until Lock Detect (LD) output goes high (true).
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