DRV8313EVM Datasheet, PDF (7/18 Pages) Texas Instruments – DRV8313 TRIPLE HALF-H-BRIDGE DRIVER IC

DRV8313
www.ti.com
SLVSBA5A – OCTOBER 2012 – REVISED NOVEMBER 2012
FUNCTIONAL DESCRIPTION
Output Stage
The DRV8313 contains three half-H-bridge drivers. The source terminals of the low-side FETs of all three half-H-
bridges terminate at separate pins (GND1, GND2, and GND3) to allow the use of a low-side current-sense
resistor on each output, if desired. The user may also connect all three together to a single low-side sense
resistor, or may connect them directly to ground if there is no need for current sensing.
If using a low-side sense resistor, take care to ensure that the voltage on the GND1, GND2, or GND3 pin does
not exceed ±500 mV.
Note that there are multiple VM motor power-supply pins. Connect all VM pins together to the motor-supply
voltage.
Bridge Control
The INx input pins directly control the state (high or low) of the OUTx outputs; the ENx input pins enable or
disable the OUTx driver. The following table shows the logic:
INx
ENx
OUTx
X
0
Z
0
1
L
1
1
H
Charge Pump
Because the output stages use N-channel FETs, the device requires a gate-drive voltage higher than the VM
power supply to enhance the high-side FETs fully. The DRV8313 integrates a charge-pump circuit that generates
a voltage above the VM supply for this purpose.
The charge pump requires two external capacitors for operation. See the block diagram and pin descriptions for
details on these capacitors (value, connection, and so forth).
The charge pump shuts down when nSLEEP is active-low.
VM
VM
CP1
0.01 F
100 V
CP2
Charge
Pump
VCP
0.1 F
16 V
To Predrivers
B0481-01
Figure 2. DRV8313 Charge Pump
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: DRV8313
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