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ADC122S021_15 Datasheet, PDF (7/28 Pages) Texas Instruments – 2 Channel, 50 ksps to 200 ksps 12-Bit A/D Converter
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ADC122S021
SNAS280D – MARCH 2005 – REVISED MARCH 2013
CS
tACQ
tCONVERT
tCH
SCLK
1
2
3
4
5
6
7
8
16
tEN
tCL
tACC
tDIS
DOUT
DIN
Z3
Z2
Z1
Z0 DB11 DB10 DB9 DB8
tSU
tH
DONT DONTC ADD2 ADD1 ADD0 DONTC DONTC DONTC
DB1 DB0
Figure 3. ADC122S021 Serial Timing Diagram
CS
SCLK
tCSU
SCLK
tCLH
Figure 4. SCLK and CS Timing Parameters
Specification Definitions
ACQUISITION TIME is the time required to acquire the input voltage. That is, it is time required for the hold
capacitor to charge up to the input voltage.
APERTURE DELAY is the time between the fourth falling SCLK edge of a conversion and the time when the
input signal is acquired or held for conversion.
CONVERSION TIME is the time required, after the input voltage is acquired, for the ADC to convert the input
voltage to a digital word.
CROSSTALK is the coupling of energy from one channel into the other channel, or the amount of signal energy
from one analog input that appears at the measured analog input.
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1
LSB.
DUTY CYCLE is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The
specification here refers to the SCLK.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS) is another method of specifying Signal-to-Noise
and Distortion or SINAD. ENOB is defined as (SINAD − 1.76) / 6.02 and says that the converter is
equivalent to a perfect ADC of this (ENOB) number of bits
FULL POWER BANDWIDTH is a measure of the frequency at which the reconstructed output fundamental
drops 3 dB below its low frequency value for a full scale input.
FULL SCALE ERROR (FSE) is a measure of how far the last code transition is from the ideal 1½ LSB below
VREF+ and is defined as:
VFSE = Vmax + 1.5 LSB – VREF+
where
• Vmax is the voltage at which the transition to the maximum code occurs
• FSE can be expressed in Volts, LSB or percent of full scale range
(1)
GAIN ERROR is the deviation of the last code transition (111...110) to (111...111) from the ideal (VREF − 1.5
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