LM3S1751 Datasheet, PDF (674/694 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

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1
0
WDTPeriphID2, type RO, offset 0xFE8, reset 0x0000.0018 (see page 383)
WDTPeriphID3, type RO, offset 0xFEC, reset 0x0000.0001 (see page 384)
PID2
WDTPCellID0, type RO, offset 0xFF0, reset 0x0000.000D (see page 385)
PID3
WDTPCellID1, type RO, offset 0xFF4, reset 0x0000.00F0 (see page 386)
CID0
WDTPCellID2, type RO, offset 0xFF8, reset 0x0000.0005 (see page 387)
CID1
WDTPCellID3, type RO, offset 0xFFC, reset 0x0000.00B1 (see page 388)
CID2
Analog-to-Digital Converter (ADC)
Base 0x4003.8000
ADCACTSS, type R/W, offset 0x000, reset 0x0000.0000 (see page 399)
CID3
ADCRIS, type RO, offset 0x004, reset 0x0000.0000 (see page 400)
ASEN3 ASEN2 ASEN1 ASEN0
ADCIM, type R/W, offset 0x008, reset 0x0000.0000 (see page 401)
INR3
INR2
INR1
INR0
ADCISC, type R/W1C, offset 0x00C, reset 0x0000.0000 (see page 402)
MASK3 MASK2 MASK1 MASK0
ADCOSTAT, type R/W1C, offset 0x010, reset 0x0000.0000 (see page 403)
IN3
IN2
IN1
IN0
ADCEMUX, type R/W, offset 0x014, reset 0x0000.0000 (see page 404)
OV3
OV2
OV1
OV0
EM3
EM2
ADCUSTAT, type R/W1C, offset 0x018, reset 0x0000.0000 (see page 408)
EM1
EM0
ADCSSPRI, type R/W, offset 0x020, reset 0x0000.3210 (see page 409)
UV3
UV2
UV1
UV0
SS3
SS2
SS1
SS0
ADCPSSI, type WO, offset 0x028, reset - (see page 411)
ADCSAC, type R/W, offset 0x030, reset 0x0000.0000 (see page 412)
SS3
SS2
SS1
SS0
ADCSSMUX0, type R/W, offset 0x040, reset 0x0000.0000 (see page 413)
MUX7
MUX6
MUX3
MUX2
MUX5
MUX1
AVG
MUX4
MUX0
674
June 18, 2012
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