MSP430F21X2_17 Datasheet, PDF (64/80 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F21x2
SLAS578J – NOVEMBER 2007 – REVISED JANUARY 2012
REVISION HISTORY
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LITERATURE
NUMBER
SLAS578
SLAS578A
SLAS578B
SLAS578C
SLAS578D
SLAS578E
SLAS578F
SLAS578G
SLAS578H
SLAS578I
SLAS578J
SUMMARY
Product Preview data sheet release
Production Data data sheet release
Corrected timer pin names throughout: TA0_0 changed to TA0.0, TA0_1 changed to TA1.0, TA1_0 changed to TA0.1,
TA2_0 changed to TA0.2, TA1_1 changed to TA1.1
Added development tool information (page 2).
Corrected TAG_ADC10_1 value from 0x10 to 0x08 (page 14).
Corrected all address offsets in Labels Used By The ADC Calibration Tags table (page 14).
Changed JTAG fuse check mode section (page 73).
Corrected parametric values in active mode supply current (into V_CC) excluding external current table (page 20).
Corrected parametric values and temperature ranges in low-power mode supply currents (into V_CC) excluding external
current table (page 22).
Corrected TAx.y pin names on RHB pinout drawing (page 3).
Changed TDI/TCLK to TEST in Note 2 of absolute maximum ratings table (page 19).
Changed lower limit of Storage temperature, Programmed device from -40°C to -55°C in absolute maximum ratings table
(page 19).
In the Labels Used By The ADC Calibration Tags table, changed the Address Offset of CAL_ADC_15T30 from 0x0006 to
0x0008 and the Address Offset of CAL_ADC_15VREF_FACTOR from 0x0005 to 0x0006 (page 14).
Changed TDI/TCLK to TEST in the Parameter description for I_FB in the JTAG fuse table (page 52).
Updated Port P1 pin schematic: P1.0, input/output with Schmitt trigger (page 53).
Updated Port P1 pin schematic: P1.1 to P1.3, input/output with Schmitt trigger (page 54).
Updated Port P1 (P1.1 to P1.3) pin functions table (page 54).
Removed Timer0_A3.CCU0B row from Port P1 (P1.5 to P1.7) pin functions table (page 56).
Updated Port P3 pin schematic: P3.1 to P3.5, input/output with Schmitt trigger (page 69).
Removed P3SEL2.x = 0 from Port P3 (P3.1 to P3.5) pin functions table header row (page 69).
Removed P3SEL2 = 0 from Port P3 (P3.6 and P3.7) pin functions table header row (page 70).
Removed JTAG pins: TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt trigger (page 71).
Updated JTAG fuse check mode section (page 72).
Corrected schematic drawings for Port 1 and Port 2 (pages 54, 55, 56, 59, 61)
Add information for RTV package options
Changed Storage temperature range limit in Absolute Maximum Ratings
Changed note (4) on 10-Bit ADC, Power Supply and Input Range Conditions.
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