DS90UB947-Q1 Datasheet, PDF (64/81 Pages) Texas Instruments – 1080p OpenLDI to FPD-Link III Serializer

DS90UB947-Q1
SNLS454 – NOVEMBER 2014
ADD
(dec)
199
ADD
(hex)
0xC7
Register Name
ISR
200
0xC8 NVM_CTL
240
0xF0 TX ID
241
0xF1
242
0xF2
243
0xF3
244
0xF4
245
0xF5
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Table 10. Serial Control Bus Registers (continued)
Bit(s)
7
6
5
4
3
2
1
0
7
6
5
4:3
2
1
0
7:0
7:0
7:0
7:0
7:0
7:0
Register
Type
R
R
R
R
R
R
RW
R
RW
RW
RW
R
R
R
R
R
R
Default
(hex)
0x00
0x00
0x00
0x5F
0x55
0x42
0x39
0x34
0x37
Function
Description
IS_IND_ACC
IS_RXDET_INT
IS_RX_INT
INT
NVM_PASS
NVM_DONE
NVM_VFY
ID0
ID1
ID2
ID3
ID4
ID5
Interrupt on Indirect Access Complete: Indirect Register Access has
completed.
Interrupt on Receiver Detect interrupt: A downstream receiver has
been detected.
Interrupt on Receiver interrupt: Receiver has indicated an interrupt
request from down-stream device.
Reserved.
Reserved.
Reserved.
Reserved.
Global Interrupt: Set if any enabled interrupt is indicated.
NVM Verify pass: This bit indicates the completion status of the NVM
verification process. This bit is valid only when NVM_DONE is
asserted.
0: NVM Verify failed.
1: NVM Verify passed.
NVM Verify done: This bit indicates that the NVM Verifcation has
completed.
Reserved.
Reserved.
NVM Verify: Setting this bit will enable a verification of the NVM con-
tents. This is done by reading all NVM keys, computing a SHA-1 hash
value, and verifying against the SHA-1 hash stored in NVM. This bit
will be cleared upon com-pletion of the NVM Verification.
Reserved.
Reserved.
First byte ID code: "_".
Second byte of ID code: "U".
Third byte of ID code: "B".
Fourth byte of ID code: "9".
Fifth byte of ID code: "4".
Sixth byte of ID code: “7”.
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