TM4C1230C3PM Datasheet, PDF (636/1103 Pages) Texas Instruments – Tiva TM4C1230C3PM Microcontroller

General-Purpose Timers
GPTMTnR and GPTMTnPS registers hold the time at which the selected input event occurred while
the GPTMTnV and GPTMTnPV registers hold the free-running timer value and the free-running
prescaler value. These registers can be read to determine the time that elapsed between the interrupt
assertion and the entry into the ISR.
In addition to generating interrupts, a μDMA trigger can be generated. The μDMA trigger is enabled
by configuring the appropriate μDMA channel. See “Channel Configuration” on page 510.
After an event has been captured, the timer does not stop counting. It continues to count until the
TnEN bit is cleared. When the timer reaches the timeout value, it is reloaded with 0x0 in up-count
mode and the value from the GPTMTnILR and GPTMTnPR registers in down-count mode.
Figure 10-4 on page 636 shows how input edge timing mode works. In the diagram, it is assumed
that the start value of the timer is the default value of 0xFFFF, and the timer is configured to capture
rising edge events.
Each time a rising edge event is detected, the current count value is loaded into the GPTMTnR and
GPTMTnPS registers, and is held there until another rising edge is detected (at which point the new
count value is loaded into the GPTMTnR and GPTMTnPS registers).
Figure 10-4. 16-Bit Input Edge-Time Mode Example
Count
0xFFFF
Z
GPTMTnR=X
GPTMTnR=Y GPTMTnR=Z
X
Y
Time
Input Signal
Note:
When operating in Edge-time mode, the counter uses a modulo 2²⁴ count if prescaler is
enabled or 2¹⁶, if not. If there is a possibility the edge could take longer than the count, then
another timer configured in periodic-timer mode can be implemented to ensure detection
of the missed edge. The periodic timer should be configured in such a way that:
■ The periodic timer cycles at the same rate as the edge-time timer
■ The periodic timer interrupt has a higher interrupt priority than the edge-time timeout
interrupt.
■ If the periodic timer interrupt service routine is entered, software must check if an
edge-time interrupt is pending and if it is, the value of the counter must be subtracted
by 1 before being used to calculate the snapshot time of the event.
636
June 12, 2014
Texas Instruments-Production Data