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LM3S2412 Datasheet, PDF (633/691 Pages) Texas Instruments – Stellaris® LM3S2412 Microcontroller
Stellaris® LM3S2412 Microcontroller
Table 18-6. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Typea Description
PD1
G2
I/O
TTL
GPIO port D bit 1.
PD2
H2
I/O
TTL
GPIO port D bit 2.
PD3
H1
I/O
TTL
GPIO port D bit 3.
PD4
E1
I/O
TTL
GPIO port D bit 4.
PD5
E2
I/O
TTL
GPIO port D bit 5.
PD6
F2
I/O
TTL
GPIO port D bit 6.
PD7
F1
I/O
TTL
GPIO port D bit 7.
PE0
A11
I/O
TTL
GPIO port E bit 0.
PE1
B12
I/O
TTL
GPIO port E bit 1.
PE2
B11
I/O
TTL
GPIO port E bit 2.
PE3
A12
I/O
TTL
GPIO port E bit 3.
PF0
M9
I/O
TTL
GPIO port F bit 0.
PF1
H12
I/O
TTL
GPIO port F bit 1.
PF2
J11
I/O
TTL
GPIO port F bit 2.
PF3
J12
I/O
TTL
GPIO port F bit 3.
PF4
L9
I/O
TTL
GPIO port F bit 4.
PF5
L8
I/O
TTL
GPIO port F bit 5.
PF6
M8
I/O
TTL
GPIO port F bit 6.
PF7
K4
I/O
TTL
GPIO port F bit 7.
PG0
K1
I/O
TTL
GPIO port G bit 0.
PG1
K2
I/O
TTL
GPIO port G bit 1.
PH0
C9
I/O
TTL
GPIO port H bit 0.
PH1
C8
I/O
TTL
GPIO port H bit 1.
PH2
D11
I/O
TTL
GPIO port H bit 2.
PH3
D10
I/O
TTL
GPIO port H bit 3.
PWM0
M9
O
TTL
PWM 0. This signal is controlled by PWM Generator 0.
PWM1
H12
O
TTL
PWM 1. This signal is controlled by PWM Generator 0.
RST
H11
I
TTL
System reset input.
SSI0Clk
M4
I/O
TTL
SSI module 0 clock
SSI0Fss
L4
I/O
TTL
SSI module 0 frame signal
SSI0Rx
L5
I
TTL
SSI module 0 receive
SSI0Tx
M5
O
TTL
SSI module 0 transmit
SWCLK
A9
I
TTL
JTAG/SWD CLK.
SWDIO
B9
I/O
TTL
JTAG TMS and SWDIO.
SWO
A10
O
TTL
JTAG TDO and SWO.
TCK
A9
I
TTL
JTAG/SWD CLK.
TDI
B8
I
TTL
JTAG TDI.
TDO
A10
O
TTL
JTAG TDO and SWO.
TMS
B9
I/O
TTL
JTAG TMS and SWDIO.
TRST
A8
I
TTL
JTAG TRST.
June 18, 2012
633
Texas Instruments-Production Data