LM3S2412 Datasheet, PDF (19/691 Pages) Texas Instruments – Stellaris® LM3S2412 Microcontroller

Stellaris^® LM3S2412 Microcontroller
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
Register 31:
Register 32:
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 290
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 291
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 293
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 294
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 295
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 296
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 297
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 298
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 299
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 300
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 301
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 302
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 303
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 304
General-Purpose Timers ............................................................................................................. 305
Register 1: GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 317
Register 2: GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 318
Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 320
Register 4: GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 322
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 325
Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 327
Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 328
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 329
Register 9: GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 331
Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 332
Register 11: GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 333
Register 12: GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 334
Register 13: GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 335
Register 14: GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 336
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 337
Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 338
Register 17: GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 339
Register 18: GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 340
Watchdog Timer ........................................................................................................................... 341
Register 1: Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 345
Register 2: Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 346
Register 3: Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 347
Register 4: Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 348
Register 5: Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 349
Register 6: Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 350
Register 7: Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 351
Register 8: Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 352
Register 9: Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 353
Register 10: Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 354
Register 11: Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 355
Register 12: Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 356
Register 13: Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 357
Register 14: Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 358
June 18, 2012
19
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