MSP430FG4619_17 Datasheet, PDF (62/115 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FG4619, MSP430FG4618, MSP430FG4617, MSP430FG4616
MSP430CG4619, MSP430CG4618, MSP430CG4617, MSP430CG4616
SLAS508J – APRIL 2006 – REVISED JUNE 2015
Table 6-10. Peripherals With Byte Access
MODULE
OA2
OA1
OA0
LCD_A
ADC12
(Memory control registers
require byte access)
USART1
USCI
Comparator_A
REGISTER NAME
Operational Amplifier 2 control register 1
Operational Amplifier 2 control register 0
Operational Amplifier 1 control register 1
Operational Amplifier 1 control register 0
Operational Amplifier 0 control register 1
Operational Amplifier 0 control register 0
LCD Voltage Control 1
LCD Voltage Control 0
LCD Voltage Port Control 1
LCD Voltage Port Control 0
LCD memory 20
:
LCD memory 16
LCD memory 15
:
LCD memory 1
LCD control and mode
ADC memory-control register 15
ADC memory-control register 14
ADC memory-control register 13
ADC memory-control register 12
ADC memory-control register 11
ADC memory-control register 10
ADC memory-control register 9
ADC memory-control register 8
ADC memory-control register 7
ADC memory-control register 6
ADC memory-control register 5
ADC memory-control register 4
ADC memory-control register 3
ADC memory-control register 2
ADC memory-control register 1
ADC memory-control register 0
Transmit buffer
Receive buffer
Baud rate
Baud rate
Modulation control
Receive control
Transmit control
USART control
USCI I2C Slave Address
USCI I2C Own Address
USCI Synchronous Transmit Buffer
USCI Synchronous Receive Buffer
USCI Synchronous Status
USCI I2C Interrupt Enable
USCI Synchronous Bit Rate 1
USCI Synchronous Bit Rate 0
USCI Synchronous Control 1
USCI Synchronous Control 0
USCI Transmit Buffer
USCI Receive Buffer
USCI Status
USCI Modulation Control
USCI Baud Rate 1
USCI Baud Rate 0
USCI Control 1
USCI Control 0
USCI IrDA Receive Control
USCI IrDA Transmit Control
USCI LIN Control
Comparator_A port disable
Comparator_A control 2
Comparator_A control 1
ACRONYM
OA2CTL1
OA2CTL0
OA1CTL1
OA1CTL0
OA0CTL1
OA0CTL0
LCDAVCTL1
LCDAVCTL0
LCDAPCTL1
LCDAPCTL0
LCDM20
:
LCDM16
LCDM15
:
LCDM1
LCDCTL
ADC12MCTL15
ADC12MCTL14
ADC12MCTL13
ADC12MCTL12
ADC12MCTL11
ADC12MCTL10
ADC12MCTL9
ADC12MCTL8
ADC12MCTL7
ADC12MCTL6
ADC12MCTL5
ADC12MCTL4
ADC12MCTL3
ADC12MCTL2
ADC12MCTL1
ADC12MCTL0
U1TXBUF
U1RXBUF
U1BR1
U1BR0
U1MCTL
U1RCTL
U1TCTL
U1CTL
UCBI2CSA
UCBI2COA
UCBTXBUF
UCBRXBUF
UCBSTAT
UCBI2CIE
UCBBR1
UCBBR0
UCBCTL1
UCBCTL0
UCATXBUF
UCARXBUF
UCASTAT
UCAMCTL
UCABR1
UCABR0
UCACTL1
UCACTL0
UCAIRRCTL
UCAIRTCTL
UCAABCTL
CAPD
CACTL2
CACTL1
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ADDRESS
0C5h
0C4h
0C3h
0C2h
0C1h
0C0h
0AFh
0AEh
0ADh
0ACh
0A4h
:
0A0h
09Fh
:
091h
090h
08Fh
08Eh
08Dh
08Ch
08Bh
08Ah
089h
088h
087h
086h
085h
084h
083h
082h
081h
080h
07Fh
07Eh
07Dh
07Ch
07Bh
07Ah
079h
078h
011Ah
0118h
06Fh
06Eh
06Dh
06Ch
06Bh
06Ah
069h
068h
067h
066h
065h
064h
063h
062h
061h
060h
05Fh
05Eh
05Dh
05Bh
05Ah
059h
62
Detailed Description
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