MSP430FG4619_17 Datasheet, PDF (53/115 Pages) Texas Instruments – Mixed-Signal Microcontrollers

www.ti.com
MSP430FG4619, MSP430FG4618, MSP430FG4617, MSP430FG4616
MSP430CG4619, MSP430CG4618, MSP430CG4617, MSP430CG4616
SLAS508J – APRIL 2006 – REVISED JUNE 2015
6.5.2 Interrupt Flag Register 1 and 2
Address
7
6
5
4
3
02h
NMIIFG
rw*0
2
1
0
OFIFG
WDTIFG
rw*1
rw*(0)
WDTIFG
OFIFG
NMIIFG
Set on watchdog timer overflow (in watchdog mode) or security key violation
Reset on V_CC power-on or a reset condition at the RST/NMI pin in reset mode
Flag set on oscillator fault
Set by the RST/NMI pin
Address
03h
7
BTIFG
rw*0
6
5
4
3
2
1
0
UTXIFG1
URXIFG1 UCB0TXIFG UCB0RXIFG UCA0TXIFG UCA0RXIFG
rw*1
rw*0
rw*0
rw*0
rw*0
rw*0
UCA0RXIFG USCI_A0 receive-interrupt flag
UCA0TXIFG USCI_A0 transmit-interrupt flag
UCB0RXIFG USCI_B0 receive-interrupt flag
UCB0TXIFG USCI_B0 transmit-interrupt flag
URXIFG0 USART1: UART and SPI receive flag
UTXIFG0 USART1: UART and SPI transmit flag
BTIFG
Basic timer flag
6.5.3 Module Enable Registers 1 and 2
Address
7
6
5
4
3
2
1
0
04h
URXE1
UTXE1
USPIE1
USART1: UART mode receive enable
USART1: UART mode transmit enable
USART1: SPI mode transmit and receive enable
Address
7
6
5
4
3
2
1
0
05h
UTXE1
URXE1
USPIE1
rw*0
rw*0
URXE1
UTXE1
USPIE1
USART1: UART mode receive enable
USART1: UART mode transmit enable
USART1: SPI mode transmit and receive enable
Copyright © 2006–2015, Texas Instruments Incorporated
Detailed Description
53
Submit Documentation Feedback
Product Folder Links: MSP430FG4619 MSP430FG4618 MSP430FG4617 MSP430FG4616 MSP430CG4619
MSP430CG4618 MSP430CG4617 MSP430CG4616