TMS320C5535_12 Datasheet, PDF (61/156 Pages) Texas Instruments – TMS320C5535, C5534, C5533,C5532 FIXED-POINT DIGITAL SIGNAL PROCESSORS

TMS320C5535
TMS320C5534, TMS320C5533, TMS320C5532
www.ti.com
SPRS737B – AUGUST 2011 – REVISED MARCH 2012
These LDOs are controlled by a combination of pin configuration and register settings. For more detailed
information see the following sections.
4.2.2.1.1 LDO Inputs
The LDOI pins (B10, B14, C14) provide power to the internal Analog and USB LDOs, the bandgap
reference generator, and some I/O input pins, and can range from 1.8 V to 3.6 V. The bandgap provides
accurate voltage and current references to the POR, LDOs, and PLL; therefore, for proper device
operation, power must always be applied to the LDOI pins even if the LDO outputs are not used.
4.2.2.1.2 LDO Outputs
The ANA_LDOO pin (B9) is the output of the internal ANA_LDO and can provide regulated 1.3 V power of
up to 4 mA. The ANA_LDOO pin is intended to be connected, on the board, to the V_{DDA_ANA} and V_{DDA_PLL}
pins to provide a regulated 1.3 V to the Power Management Circuits and System PLL. V_{DDA_ANA} and
V_{DDA_PLL} may be powered by this LDO output, which is recommended, to take advantage of the device's
power management techniques, or by an external power supply. The ANA_LDO cannot be disabled
individually (see Section 4.2.1.1.3, LDO Control).
The USB_LDOO pin (D13) is the output of the internal USB_LDO and provides regulated 1.3 V, software-
switchable (on/off) power of up to 25 mA. The USB_LDOO pin is intended to be connected, on the board,
to the USB_V_DD1P3 and USB_V_DDA1P3 pins to provide power to portions of the USB. Optionally, the
USB_V_DD1P3 and USB_V_DDA1P3 may be powered by an external power supply and the USB_LDO can be
left disabled. When the USB_LDO is disabled, its output pin is in a high-impedance state.
4.2.2.1.3 LDO Control
Both LDOs can be simultaneously disabled via software by writing to either the BG_PD bit or the LDO_PD
bit in the RTCPMGT register (see Figure 4-1). When the LDOs are disabled via this mechanism, the only
way to re-enable them is by asserting the WAKEUP signal pin (which must also have been previously
enabled to allow wakeup), or by a previously enabled and configured RTC alarm, or by cycling power to
the CV_DDRTC pin.
ANA_LDO: The ANA_LDO is only disabled by the BG_PD and the LDO_PD mechanism described above.
Otherwise, it is always enabled.
USB_LDO: The USB_LDO can be independently and dynamically enabled or disabled by software via the
USB_LDO_EN bit in the LDOCNTL register (see Figure 4-2). The USB _LDO is disabled at reset.
Table 4-4 shows the ON/OFF control of each LDO and its register control bit configurations.
Copyright © 2011–2012, Texas Instruments Incorporated
Device Configuration
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