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SN74LV595A-EP Datasheet, PDF (6/17 Pages) Texas Instruments – 8-BIT SHIFT REGISTER WITH 3-STATE OUTPUT REGISTERS
SN74LV595AĆEP
8ĆBIT SHIFT REGISTER
WITH 3ĆSTATE OUTPUT REGISTERS
SCLS568B − JANUARY 2004 − REVISED MAY 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VOH
QH′
QA−QH
QH′
QA−QH
VOL
II
IOZ
ICC
Ioff
Ci
QH′
QA−QH
QH′
QA−QH
TEST CONDITIONS
IOH = −50 µA
IOH = −2 mA
IOH = −6 mA
IOH = −8 mA
IOH = −12 mA
IOH = −16 mA
IOL = 50 µA
IOL = 2 mA
IOL = 6 mA
IOL = 8 mA
IOL = 12 mA
IOL = 16 mA
VI = 5.5 V or GND
VO = VCC or GND
VI = VCC or GND,
VI or VO = 0 to 5.5 V
VI = VCC or GND
IO = 0
VCC
2 V to 5.5 V
2.3 V
3V
4.5 V
2 V to 5.5 V
2.3 V
MIN
VCC−0.1
2
2.48
2.48
3.8
3.8
3V
4.5 V
0 to 5.5 V
5.5 V
5.5 V
0
3.3 V
TYP MAX UNIT
V
0.1
0.4
0.44
V
0.44
0.55
0.55
±1 µA
±5 µA
20 µA
5 µA
3.5
pF
timing requirements over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
MIN MAX
MIN MAX UNIT
SRCLK high or low
7
7.5
tw
Pulse duration
RCLK high or low
SRCLR low
7
7.5
ns
6
6.5
tsu Setup time
SER before SRCLK↑
SRCLK↑ before RCLK↑†
SRCLR low before RCLK↑
5.5
5.5
8
9
ns
8.5
9.5
SRCLR high (inactive) before SRCLK↑
4
4
th
Hold time
SER after SRCLK↑
1.5
1.5
ns
† This setup time allows the storage register to receive stable data from the shift register. The clocks can be tied together, in which case the shift
register is one clock pulse ahead of the storage register.
6
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