ONET8541T_16 Datasheet, PDF (6/17 Pages) Texas Instruments – 11.3 Gbps Limiting Transimpedance Amplifier

ONET8541T
SLLSE85A – JULY 2011 – REVISED AUGUST 2011
DETAILED DESCRIPTION
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SIGNAL PATH
The first stage of the signal path is a transimpedance amplifier which converts the photodiode current into a
voltage. If the input signal current exceeds a certain value, the transimpedance gain is reduced by means of a
nonlinear AGC circuit to limit the signal amplitude.
The second stage is a limiting voltage amplifier that provides additional limiting gain and converts the single
ended input voltage into a differential data signal. The output stage provides CML outputs with an on-chip 50Ω
back-termination to V_CC.
FILTER CIRCUITRY
The FILTER pins provide a filtered V_CC for a PIN photodiode bias. The on-chip low pass filter for the photodiode
is implemented using a filter resistor of 220Ω and a capacitor. The corresponding corner frequency is below
5MHz. The supply voltages for the transimpedance amplifier are filtered by means of on-chip capacitors, thus
avoiding the necessity to use an external supply filter capacitor. The input stage has a separate V_CC supply
(VCC_IN) which is not connected on chip to the supply of the limiting and CML stages (VCC_OUT).
AGC AND RSSI
The voltage drop across the internal photodiode supply-filter resistor is monitored by the bias and RSSI control
circuit block in the case where a PIN diode is biased using the FILTER pins.
If the dc input current exceeds a certain level then it is partially cancelled by means of a controlled current
source. This keeps the transimpedance amplifier stage within sufficient operating limits for optimum performance.
The automatic gain control circuitry adjusts the voltage gain of the AGC amplifier to ensure limiting behavior of
the complete amplifier.
Finally this circuit block senses the current through the filter resistor and generates a mirrored current that is
proportional to the input signal strength. The mirrored current is available at the RSSI_IB output and can be sunk
to ground (GND) using an external resistor. For proper operation, ensure that the voltage at the RSSI_IB pad
does not exceed V_CC – 0.65V.
If an APD or PIN photodiode is used with an external bias then the RSSI_EB pin should be used. However, for
greater accuracy under external photo diode biasing conditions, it is recommended to derive the RSSI from the
external bias circuitry.
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