MSP430G2553-Q1_15 Datasheet, PDF (6/71 Pages) Texas Instruments – Automotive Mixed-Signal Microcontrollers

MSP430G2553-Q1, MSP430G2453-Q1
SLAS966 – MARCH 2014
7.3 Terminal Functions
TERMINAL
NAME
NO.
PW20 PW28
P1.0/
TA0CLK/
ACLK/
2
2
A0
CA0
P1.1/
TA0.0/
UCA0RXD/
UCA0SOMI/
3
3
A1/
CA1
P1.2/
TA0.1/
UCA0TXD/
UCA0SIMO/
4
4
A2/
CA2
P1.3/
ADC10CLK/
A3/
5
5
VREF-/VEREF-/
CA3/
CAOUT
P1.4/
SMCLK/
UCB0STE/
UCA0CLK/
A4/
6
6
VREF+/VEREF+/
CA4/
TCK
P1.5/
TA0.0/
UCB0CLK/
UCA0STE/
7
7
A5/
CA5/
TMS
www.ti.com
Table 2. Terminal Functions
I/O
DESCRIPTION
General-purpose digital I/O pin
Timer0_A, clock signal TACLK input
I/O ACLK signal output
ADC10 analog input A0
Comparator_A+, CA0 input
General-purpose digital I/O pin
Timer0_A, capture: CCI0A input, compare: Out0 output / BSL transmit
USCI_A0 UART mode: receive data input
I/O
USCI_A0 SPI mode: slave data out/master in
ADC10 analog input A1
Comparator_A+, CA1 input
General-purpose digital I/O pin
Timer0_A, capture: CCI1A input, compare: Out1 output
USCI_A0 UART mode: transmit data output
I/O
USCI_A0 SPI mode: slave data in/master out
ADC10 analog input A2
Comparator_A+, CA2 input
General-purpose digital I/O pin
ADC10, conversion clock output
ADC10 analog input A3
I/O
ADC10 negative reference voltage
Comparator_A+, CA3 input
Comparator_A+, output
General-purpose digital I/O pin
SMCLK signal output
USCI_B0 slave transmit enable
USCI_A0 clock input/output
I/O
ADC10 analog input A4
ADC10 positive reference voltage
Comparator_A+, CA4 input
JTAG test clock, input terminal for device programming and test
General-purpose digital I/O pin
Timer0_A, compare: Out0 output / BSL receive
USCI_B0 clock input/output
I/O USCI_A0 slave transmit enable
ADC10 analog input A5
Comparator_A+, CA5 input
JTAG test mode select, input terminal for device programming and test
6
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated
Product Folder Links: MSP430G2553-Q1 MSP430G2453-Q1