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| LMK61PD0A2 Datasheet, PDF (6/27 Pages) Texas Instruments – Ultra-Low Jitter Pin Selectable Oscillator | |||
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LMK61PD0A2
SNAS675A â OCTOBER 2015 â REVISED NOVEMBER 2015
www.ti.com
7.5 Electrical Characteristics - Power Supply(1)
VDD = 3.3 V ± 5%, TA = -40C to 85°C
PARAMETER
IDD
Device Current Consumption
TEST CONDITIONS
LVPECL (2)
LVDS
HCSL
IDD-PD
Device Current Consumption OE = GND
when output is disabled
MIN
TYP
MAX
162
208
152
196
155
196
136
UNIT
mA
(1) Refer to Parameter Measurement Information for relevant test conditions.
(2) On-chip power dissipation should exclude 40 mW, dissipated in the 150 ohm termination resistors, from total power dissipation.
7.6 LVPECL Output Characteristics(1)
VDD = 3.3 V ± 5%, TA = -40C to 85°C
PARAMETER
fOUT
Output Frequency(2)
VOD
Output Voltage Swing
(VOH - VOL)(2)
VOUT, DIFF, PP Differential Output Peak-to-
Peak Swing
TEST CONDITIONS
VOS
Output Common Mode
Voltage
tR / tF
Output Rise/Fall Time (20% to
80%) (3)
PN-Floor
ODC
Output Phase Noise Floor
(fOFFSET > 10 MHz)
Output Duty Cycle(3)
156.25 MHz
MIN TYP
62.5
700
800
2x
|VOD|
VDD â
1.55
120
-165
45%
(1) Refer to Parameter Measurement Information for relevant test conditions.
(2) An output frequency over fOUT max spec is possible, but output swing may be less than VOD min spec.
(3) Ensured by characterization.
MAX
312.5
1200
200
55%
UNIT
MHz
mV
V
V
ps
dBc/Hz
7.7 LVDS Output Characteristics(1)
VDD = 3.3 V ± 5%, TA = -40°C to 85°C
PARAMETER
fOUT
Output Frequency(1)
VOD
Output Voltage Swing
(VOH - VOL)(1)
VOUT, DIFF, PP Differential Output Peak-to-
Peak Swing
TEST CONDITIONS
VOS
Output Common Mode
Voltage
tR / tF
Output Rise/Fall Time (20% to
80%) (2)
PN-Floor
ODC
Output Phase Noise Floor
(fOFFSET > 10 MHz)
Output Duty Cycle(2)
156.25 MHz
ROUT
Differential Output Impedance
MIN
62.5
300
45%
TYP
390
2x
|VOD|
1.2
150
-162
125
(1) An output frequency over fOUT max spec is possible, but output swing may be less than VOD min spec.
(2) Ensured by characterization.
MAX
312.5
480
250
55%
UNIT
MHz
mV
V
V
ps
dBc/Hz
Ohm
6
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