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DS92LV010A_13 Datasheet, PDF (6/17 Pages) Texas Instruments – Bus LVDS 3.3/5.0V Single Transceiver
DS92LV010A
SNLS007E – MAY 1998 – REVISED APRIL 2013
5V AC ELECTRICAL CHARACTERISTICS (1)
TA = −40°C to +85°C, VCC = 5.0V ± 0.5V
Parameter
Test Conditions
DIFFERENTIAL DRIVER TIMING REQUIREMENTS
tPHLD
tPLHD
Differential Prop. Delay High to
Low
Differential Prop. Delay Low to
High
RL = 27Ω, See Figure 4 and Figure 5
CL = 10 pF
tSKD
Differential SKEW |t PHLD -
tPLHD|
tTLH
Transition Time Low to High
tTHL
Transition Time High to Low
tPHZ
Disable Time High to Z
tPLZ
Disable Time Low to Z
RL = 27Ω, See Figure 6 and Figure 7
CL = 10 pF
tPZH
Enable Time Z to High
tPZL
Enable Time Z to Low
DIFFERENTIAL RECEIVER TIMING REQUIREMENTS
tPHLD
tPLHD
Differential Prop. Delay High to
Low
Differential Prop. Delay Low to
High
See Figure 8 and Figure 9
CL = 10 pF
tSKD
Differential SKEW |t PHLD -
tPLHD|
tr
Rise Time
tf
Fall Time
tPHZ
Disable Time High to Z
tPLZ
Disable Time Low to Z
tPZH
Enable Time Z to High
tPZL
Enable Time Z to Low
RL = 500Ω, See Figure 10 and Figure 11
CL = 10 pF(2)
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Min Typ Max Units
0.5
2.7 4.5
ns
0.5
2.5 4.5
ns
0.2 1.0
ns
0.3 2.0
ns
0.3 2.0
ns
0.5
3.0 7.0
ns
0.5 5.0 10.0 ns
2.0
4.0 7.0
ns
1.0
4.0 9.0
ns
2.5 5.0 12.0 ns
2.5 4.6 10.0 ns
0.4 2.0
ns
1.2 2.5
ns
1.2 2.5
ns
2.0
4.0 6.0
ns
2.0
4.0 6.0
ns
2.0
5.0 9.0
ns
2.0
5.0 7.0
ns
(1) Generator waveforms for all tests unless otherwise specified: f = 1MHz, ZO = 50Ω, tr, tf ≤ 6.0ns (0%–100%) on control pins and ≤ 1.0ns
for RI inputs.
(2) For receiver tri-state delays, the switch is set to VCC for tPZL, and tPLZ and to GND for tPZH, and tPHZ.
TEST CIRCUITS AND TIMING WAVEFORMS
Figure 3. Differential Driver DC Test Circuit
6
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