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CD54HC4051_15 Datasheet, PDF (6/45 Pages) Texas Instruments – High-Speed CMOS Logic Analog Multiplexers and Demultiplexers
CD54HC4051, CD74HC4051
CD54HCT4051, CD74HCT4051, CD54HC4052, CD74HC4052, CD54HCT4052
CD74HCT4052, CD54HC4053, CD74HC4053, CD54HCT4053, CD74HCT4053
SCHS122K – NOVEMBER 1997 – REVISED SEPTEMBER 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
VCC – VEE DC supply voltage
VCC
DC supply voltage
VEE
DC supply voltage
IIK
DC input diode current
IOK
DC switch diode current
DC switch current(2)
ICC
IEE
TJMAX
TLMAX
Tstg
DC VCC or ground current
DC VEE current
Maximum junction temperature
Maximum lead temperature
Storage temperature
VI < – 0.5 V or VI > VCC + 0.5 V
VI < VEE – 0.5 V or VI > VCC + 0.5 V
VI > VEE – 0.5 V or VI < VCC + 0.5 V
Soldering 10 s
MIN
MAX
–0.5
10.5
–0.5
7
0.5
–7
±20
±20
±25
±50
–20
150
300
–65
150
UNIT
V
V
V
mA
mA
mA
mA
mA
°C
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages referenced to GND unless otherwise specified.
6.2 ESD Ratings
V(ESD) Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
Charged device model (CDM), per JEDEC specification JESD22-C101, all
pins (2)
VALUE
±500
±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)
VCC
VCC –
VEE
VEE
VI
VIS
TA
tr, tf
Supply voltage range
(TA = full package temperature
range) (2)
Supply voltage range
(TA = full package temperature range)
Supply voltage range
(TA = full package temperature
range) (3)
DC input control voltage
Analog switch I/O voltage
Operating temperature
Input rise and fall times
CD54 and 74HC types
CD54 and 74HCT types
CD54 and 74HC types, CD54 and 74HCT
types (see Figure 1)
CD54 and 74HC types, CD54 and 74HCT
types (see Figure 2)
2V
4.5 V
6V
MIN NOM MAX UNIT
2
6
V
4.5
5.5
2
10 V
0
GND
VEE
–55
0
0
0
–6 V
VCC V
VCC V
125 °C
1000
500 ns
400
(1) For maximum reliability, nominal operating conditions must be selected so that operation is always within the ranges specified in the
Recommended Operating Conditions table.
(2) All voltages referenced to GND unless otherwise specified.
(3) In certain applications, the external load resistor current may include both VCC and signal line components. To avoid drawing VCC
current when switch current flows into the transmission gate inputs, the voltage drop across the bidirectional switch must not exceed
0.6 V (calculated from rON values shown in Electrical Specifications table). No VCC current will flow through RL if the switch current flows
into terminal 3 on the HC and HCT4051; terminals 3 and 13 on the HC and HCT4052; terminals 4, 14, and 15 on the HC and HCT4053.
6
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